RGPV Exams Questions Papers IV SEM – Digital Circuit & systems – June -2007

                                              B.E. (Fourth semester) EXAMINATION, JUNE, 2007

(Common for EC/EE/EX Engg.)

(DIGITAL CIRCUIT AND SYSTEM)

(EE/EC/EX-402)

 

Note:     Attempt any five questions. All question carry equal marks. Assume any missing data.

1. (a)  What are the alphanumeric codes ? Explain with suitable example .

(b)  Convert (2AC5.D)16 to:

      (i) Decimal

     (ii) Octal

    (iii) Binary

(c ) Add the following numbers :

       (1 AB) 16  and ( 67B)16

(d) Perform the subtraction by 2’s complement method 100-110000.

2. (a) Prove the following using De Morgan’s theorem:

         And hence , prove that an AND-OR configuration is equivalent to NAND-NAND configuration.

(b) Implement and realize the following function using the do not care conditions d. Assume that both

       the complement and normal inputs are available:

     F = A’B’C’ + A B’D’  + A’BCD

    D = ABC + AB’D’

3.  (a) Design a Schmitt trigger circuits using logic gates.

(b) Draw and explain the BCD adder circuits. (use logic block diagrams)

4. (a) Draw and explain the TTL logic circuit.

(b) Compare the DTL and TTL and ECL logic families for the following parameters:

    (i) Fan-out     (ii) Speed of operation

   (iii) Noise margin   (iv) Power dissipation 

5. (a) What are the Synchronous and Asynchronous system ? Explain.

(b) Draw the block diagram of Binary ripple counter and explain with suitable wave forms.

6. (a) Draw the logical diagram of binary ripple counter and explain the operation .

   (b) The content of a 4-bit shift register is initially 1101. The register is shifted 6 times to the right with

          the serial output being 101101. What is the content of the register after each shift? Justify your

         answer.

7. (a) Design a binary to Excess-3 code converter. Use any one method.

   (b) Explain multiplexer and demultiplexer circuits.

8.   Write short notes on any three of the following :

        (i) ECL logic family         (ii)  Open collector TTL    (iii) Look-ahead carry generator   

      (iv) PLAs       (v) A/D converter       (vi) Sample and Hold circuits

Leave a Comment