RGPV Exams Questions Papers IV SEM – Digital Circuit & systems June-2005

                                                B.E. (Fourth semester) EXAMINATION,june, 2005

(Common for EC/EE/EX Engg.)




Note:     Attempt  any five questions. All question carry equal marks. Assume any missing data.

       1.   (a) Convert the following:

                (i) (10111101)2 =  (  )8

                         (ii)  (C3A6)16  =    (    )2

                       (iii)  (3906)10    =  (   )BCD

                      (iv)  (370)8    =  (   )16.

             (b)   Minimize the following expression using K-maps and release with NAND gates:

                    F (A,B,C,D)  = ? m (2,3,6,7,8,9,10,11,12,13,14,15)

2. (a) Implement of full subtractor with two half subtractor an OR gate.

(b) Design a binary parallel adder.

3. (a) Explain the operation of ECL gate.

(b) Define a following;

(i) Propagation delay time of a logic gate.

(ii) Figure of merit of digital IC

(iii) Fan out and fan in

(iv) Noise margin

4. (a) Design a 4-bidirectional shift resister with parallel load .

(b) What are a combinational logic circuit and sequential logic circuit? Explain

5. (a) Design a synchronous BCD a counter using minimum number of J-K flip-flop and gates.

(b) Differentiate between synchronous and asynchronous counter.

6. (a) Design a BCD to decimal decoder

(b) Design a combination circuit that converter 4-bit BCD to gray code.

7. (a) Explain the operation of a J-K flip-flop. What is meant by raise around condition? What is master –

        slave flip-flop?

(b) Explain the working of digital to analog converter.

8.  Write short note on any two of the following:

(i) ROM

(ii) Multiplexer

(iii) Bistable multavibrator

(iv) Encoder

(v) Sample and hold circuit

(vi) BCD Adder

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