B.E. (Fourth semester) EXAMINATION, JUNE, 2003
(Common for EC/EE/EX Engg.)
(DIGITAL CIRCUIT AND SYSTEM)
Note: Attempt any five questions. All question carry equal marks.
1. (a) (i) Subtract 365 (octal) from 173 (octal) use 8’s complement addition to perform the subtraction .
(ii) Give the Gray-coded equivalent of the hex number 3 A 7.
(b) What is the limitation of Karnaugh map method? Explain Quine-McCluskey method of minimization.
2. (a) Obtain NAND logic diagram of a full adder from the Boolean function :
C = xy + xz + yz
S = C (x + y + z ) + xyz
(b) Design a combinational circuit that converts a decimal digit from 8, 4, – 2, -1 code to BCD
3. (A) Explain the working of a fixed bias transistor Binary and its application.
(b) A collector coupled monostable multiusing n-p-n silicon transistor has the following papameters.
VCC =12 V, VBB=3 V, RC=2 K, R1=R=20 K, hef=30,rbb=200? and C=1000 pF. Neglect ICBO.
(i) Calculate and plot the wave shapes at each base and controller.
(ii) Find the width of the output pulse.
4. (a) Diffrencaite between MOS and CMOS on the basis of characteristics , advantages and
(b) Explain about gated flip-flop and gate multivibrators.
5. (a) Explain ROM and its workings. How it is different from PLA ?
(b) What is decoder and explain how 4 by 16 decoder is constructed?
6. (a) Explain the designing features and working of 3-bit bidirectional shift-register with parallel load.
(b) Distinguish between synchronous and asynchronous conters.
7. Explain the following:
(i) Types of A/D converters
(ii) V-F coverters
(iii) Sample and hold circuits
8. Write short notes on any two of the following:
(i) Schmitt trigger
(ii) Ring counter
(iii) I2 L logic and application
(iv) Half and full ADDER