CSVTU EE Electrical Digital Electronics And Logic Design Syllabus

CSVTU EE Electrical Digital Electronics And Logic Design Syllabus

CHHATISGARH SWAMI VIVEKANAND TECHNICAL UNIVERSITY, BHILAI (C.G.)

Semester: IV Branch: Electrical

Subject: Digital Electronics And Logic Design

Total Theory Periods: 40 Total Tut Periods: 12

Total Marks in End Semester Exam: 80

Minimum number of Class tests to be conducted: 2

UNIT I: Number System and Codes

Number systems: Decimal, binary, hexadecimal, Octal number systems with mutual conversion,

Binary arithmetic in computers BCD Addition, Subtraction

Binary code: Weighted and non-weighted codes, Error detecting and Correcting codes, ASCII Codes,

Hamming Code, Alphanumeric Codes

UNIT II: Boolean algebra &Logic Gates

Development of Boolean algebra, Boolean logic operations, AND, OR, NOT, Universal building

blocks, Basic laws of Boolean algebra, Demorgan’s Theorem, Minterms & Maxterms, Deriving SOP

& POS Expression from Canonical & standard form, Truth table, Karnaugh map (up to five

variables), Minimization of logic function in SOP, POS and mixed term, Incompletely Specified

functions, Multiple output, Minimization using Quine McClusky or Tabulation method.

Logic Gates

:

Positive and Negative Logic, Designation, OR, AND, NOT, NAND, NOR, XOR,

XNOR, gates, Multilevel Gating Networks, NAND and NOR implementation, XOR and Equivalence

function.

UNIT III: Combinational Circuits And Systems

Design procedure: Adder, Subtractor, Binary parallel adder, Serial adders, Decimal adders, and Fast

adders, Multiplexers, Demultiplexers, Decoders, Encoders, Priority encoders, Parity generator/

checkers, Magnitude comparators, Code converters, Programmable logic array (PLA), ROM,

Application of Multiplexers, Decoders and Comparators.

UNIT IV: Flip flop and its applications

Flip flop: Types, SR, JK, D and T type flip-flop, Triggering of Flip flops, Master Slave flip flop,

Realization of one flip flop using other flip flops,

Registers and counters: Shift register, Bi-directional register, Asynchronous counter, Binary ripple

counters, Asynchronous up-down counters, Synchronous up-down counter, Design of modulo-N

synchronous counter, Ring counters, Sequence generator using counter.

UNIT V: Memory devices& Sequential machines

Classification of memories, semiconductor ROM and RAM, Organization of RAM,

Memory subsystem, Timing circuit, clock circuit and IC timer.

Design of synchronous sequential machines: Basic concepts, synchronous sequential machine

models, design of synchronous sequential circuit, sequence detectors, odd/even parity generator,

Basic concept, asynchronous sequential circuits, Design of fundamental mode of asynchronous

sequential circuit by Flip flops

Text Books

: 1. “Digital logic and concept design”, Morris Mano, PHI Pbs.

2. “Study, theory and logic design” Jain, TMH

Reference Books

:

1. “

An Introduction To Digital Computer Design”, V, Rajaraman and Radhakrishnan, 3

rd

Edition, PHI Pbs.

2. “

Digital Principles And Application” Malvino & Leach, 4th

Edition, M

 

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