CSVTU BE VIII Semester EEE DSP Processors and Applications Syllabus

CSVTU BE VIII Semester EEE DSP Processors and Applications Syllabus

CHHATTISGARH SWAMI VIVEKANAND TECHNICAL UNIVERSITY BHILAI (C.G.)

Semester :VIII Branch: E & T / EEE

Subject:DSP Processors and Applications

Total Theory Periods:

40 Total Tutorial Periods:

Total Marks in End Semester Examination:

Minimum number of Class tests to be conducted:

UNIT – I

Instruction Set and Architecture of DSP Processor:

Computational characteristics of DSP algorithms and applications: their influence on defining a generic instruction-set architecture for DSPs.

UNIT – II

Architectural Requirement of DSPs:

High throughput, low cost, low power, small code size, embedded

application techniques for enhancing computational throughput; parallelism and pipelining.

UNIT – III

Data-path of DSPs:

multiple on-chip memories and buses, dedicated address generator units, specialized

processing units. Hardware multiplier, ALU, Shifter and on-chip peripherals for communication and control.

UNIT – IV

Control Unit of DSPs:

Pipelined instruction execution, specialized hardware for zero-overhead looping,

Interrupts. Architecture of Texas instruments fixed-point and floating-point DSPs, Brief description of ADSP

218X/2106X DSPs, Programmer’s model.

UNIT – V

Advanced DSPs:

TI’s 320C6X, ADI’s Tiger-SHARC, Lucent technologies’ DSP 16000 VLIW processors.

Applications: a few case studies of application of DSPs in Communication and Multimedia.

Text Books:

1. Architecture for Digital Signal Processing, P. Pirsch, Jhon Wiley

2. Digital Signal Processors: Architectures, Implementations and Applications by Kuo, Pearson

Education Pub.

Reference Books:

1. Digital Signal Processing in VLSI, R.J. Higgins

2. Texas Instruments TMSC5X, C54X and C6X Users manuals.

3. VLSI Digital Signal Processing Systems, K. Parthi, John Wiley

4. Digital Signal Processing for Multimedia Systems, K. Parthi and T. Nishitani, Marcel Dekker.

5. IEEE

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