WBUT Previous Years Question Papers EC Microprocessor And Microcontroller B Tech Fifth Sem

   

WBUT  Previous Years Question Papers

EC Microprocessor And Microcontroller B Tech Fifth Sem

 

 

The figures in the margin Indicate  marks.

Candidates are required to give their answers in their own words

as jar as practicable

GROUP-A ( Multiple Choice Type Question* )

1 Choose the correct alternatives for any ten of the following :    10 x 1 = 10

i)         The control signal used to distinguish between an I/O operation and memory operation is

a) ALE                               b) IO/M

c) SID                                d) SOD.

ii)   The control signal. HOLD is sent by 8085 in order to

a)        inform I/O device that the address is being sent . over the AD line

b)        achieve separation of address from data

c)        synchronize with low speed peripheral

d)        to activate DMA.

iii)    In JZ next instruction of 8051 microcontroller which register’s content is checked to see if it is zero ?

a)       -A                               b) B

^ c) R1                                   d) R2.

iv)      If Ready pin is grounded, it will introduce

states into the BUS cycle of 8086/8088 microprocessors.

a)       wait                            b) idle

c)       wait and remains idle d) all of these.

v)       Whenever the P6P H instruction is executed

a)       data bytes in the HL pair are stored on the stack

b)      two data bytes at the top of the stack are . transferred to the HL reg. pair

c)       .         two data bytes at the top of the stack are transferred to the PC

d)       two data bytes from HL reg. pair that were previously stored on the stack are transferred back to the HL registers.

vi)     For 8255 PPI, the bidirectional mode of operation is

‘ ‘ • ’• . ” • . . * ‘ • ‘ – ‘ supported in             /

a)       mode l                        b) mode 2

c)       mode 0                        d) either (a) or (b)

 

vii)     If a DMA request is sent to the microprocessor with a Hi signal to the HOLD pin, the microprocessor acknowledge the request

a)        after completing the present cycle

b)        immediately after receiving the signal

c)  after completing the program                     ,

d)        none of these.

viii)   STA 9O0OH is a

a)     ‘ data transfer instruction

b)        logical mstruction                              .

c)        I/O and machine control instruction

d)        none of these.

ix)      The segment and offset address of the instruction to be executed by 8086 microprocessor are pointed by

a CS and SI                    b) DS and IP .

c) CS and SP                      d) CS and IP

x)        The instruction register holds

a)        flag conditions ’                                             .

b)        instructions address

c)        opcodes

d)        none of these.

xi)      For 8257 controller, the   highest priority channel by default is

a) CH-0                    .       b) CH-3

c)   CH-1    d) any channel, xli) Machine cycles in “CALL” instruction of 8085 CPU are

a) 6                                  b) 5

c) 4                                  d) 3.                             ‘

GROUP -B (Short Answer Type Questions )

Answer any three of the following. 3×5=15

  1. a) Explain the functions of pin as follows :

. READY, ALE, RESET

b)        Can an input port and an output port have the same address ? Justify.   Q – _

O +

  1. a) How does the microprocessor differentiate between data

and instruction ?

b)        Explain the need to demultiplex the bus AD7-ADO. How is demultiplexing done ?                                                                          j + 4

  1. a) Write down the difference between flag register of 8085

microprocessor and flag register of 8086 microprocessor.     >

b)        How is sub-routine handled by microprocessor ? 2 + 3

a)       Define addressing mode in 8085 microprocessor.

b)       How many addressing modes are available in

8085 microprocessor ? Explain with two examples

each.

a)       What is pipelined architecture ? How is it implemented

in 8086 microprocessor ?

b)       How many address lines are used for I/O mapped I/O

technique in the context of interfacing with 8086 ?

GROUP -C (Long Answer Type Questions )

Answer any three of the following. 3×15 = 45

a)       Draw the timing waveform of Mode 1 input control signals of 8255.

b)       Write an Assembly Language Programming in 8085 to interface a 8255 chip with Port B address DDh to scan Port A and send the data to Port B. Draw the logical . circuit diagram.                                                       6 + 4 + 5

a)       What is software interrupt in 8085 microprocessor

b)       Explain the instruction SIM & RIM in 8085 microprocessor.

[ Turn over

c)        What is RST instruction of 8085 |xP ? Draw the logical circuit for RST 6 interrupt and write the corresponding Assembly Language Programming. 2 + 5 + 1 + 3 + 4

  1. a) Explain the function of different types of control and

status signals of 8085 jaP. •

b)        Explain the need to demultiplex the bus AD7-AD0 of 8085 yP. What is the need of ALE signal in this purpose?

c)        What is fold back memory ? Give an example.

d)        if the 8085 fiP clock frequency is 2 MHz then calculate the time required to execute the instruction STA 2000h. .                           4 + 3 + 4 + 4

  1. a) What is interrupt vector table ? Explain its structure.

Explain the interrupt response sequence of 8086.

. b) What is the interrupt vector address of the following .         interrupt in the 8086 IVT ?

i)           INTO

ii)         NMI

iii)        INT21H.

c)        How will you interface a stepper motor with 8086 ?

Draw the interfacing circuit and flow-chart.

( 1 + 2 + 3) + 3 + 6

  1. Write short notes on any three of the following :

a)       Addressing modes of 8051 microcontroller

b)        8259 Interrupt controller

c)        Min /Max mode operations of 8086 microprocessor1

d)       Architecture of 8051 microcontroller

e)        DMA data transfer scheme.

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