VTU Previous Year Question Papers BE CS Advanced Computer Architecture December 2011

VTU Previous Year Question Papers BE CS  Eight Semester

Advanced Computer Architecture December 2011

 

PART-A

Note: Answer any FIVE full questions, selecting at least TWO questions from each part.

1 a. Define the computer architecture. Explain the response time, throughput, elapsed time and processor clock.

b.   Briefly explain the Amdahl’s law.

c.   Two code sequences for a particular machine are considered by a compiler designer. Instruction class CPI for this instruction class A

The compiler designer considers 2 code sequences that require the following instruction

Code sequence Instruction counts for instruction class
A B C
1 20 10 20
2 40 10 10

i)Which code sequence executes most of the instructions?

ii) What is the CPI for each sequence?

iii)    Which will be faster?

 

2 a. What are the major hurdles of pipelining? Illustrate the data hazard, briefly.

b.  With a neat block diagram, explain how an instruction can be executed in 4 or 5 clock cycles in MIPS data path, without the pipeline register.

 

3 a. List the steps to unroll the code and schedule.

b.   Explain how Tomasulo’s algorithm can be extended to support speculation.

c.   Explain the dynamic branch prediction state diagram.

 

4 a. Explain the basic VLIW approach. List its drawbacks.

b.  With a neat diagram, explain the steps involved in handling an instruction, with a branch target buffer. Also evaluate how well it works,

PART-B

5 a. Explain the different taxonomy of parallel architecture.

b,  With a neat diagram, explain the basic structure of a centralized shared – memory and distri buted – mem ory mu ltiproce ssor.                                                                    (06 M a rks)

c.   Explain the snooping, with a respect to cache – coherence protocols.

 

6 a. Explain the six basic optimizations.

b. With a neat diagram, explain the hypothetical memory hierarchy.

 

7 a. Explain the DRAM technology. How do you improve memory performance inside a DRAM chip?

b. plain the compiler optimizations to reduce miss rate.

 

8 a. Find all the true dependences, output dependences and anti dependences and eliminate the output and anti dependences by renaming, in the code given below

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