VTU Previous Exam Papers-BE-CSE-Computer Organization-May/June 2010

VTU CSE 4th Semester Computer Organization May 2010

VTU CSE 4th Semester Computer Organization Question Paper May 2010: You should practice more Question papers are the best materials to prepare for any exam. You can also overcome the exam fear and develop confidence. Exam papers will give you an idea about the real exam. By practicing more papers you will easily identify the important topics from every chapter. That will help you to score better marks. It will give you information about the important chapters and concepts to be covered in all chapters.

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VTU CSE 4th Semester Computer Organization Question Paper May 2010

You must have Computer Organization Question Paper along with the latest Computer Science 4th sem Syllabus to enhance your semester exam preparation.

Here you can check the VTU CSE 4th Semester Computer Organization Question Paper May 2010

1 a. PC contains the address of the instruction stored in main memory of the computer. The instruction is “MOVE (R3), R2”. List the steps needed to execute the machine instruction MOVE (R3), R2.

b. Explain with examples, all the generic addressing modes, with assembler syntax.

2. a. Convert the following pairs of signed decimal numbers to 5 bit 2’s. Complement the numbers and add them. State whether overflow occurs or not.

i) -14 and 11 ii)-10 and-13 iii)-3and-8.

b. What is word alignment of a machine (microprocessor based system)? Explain. What are the consecutive addresses of aligned words for 16, 32 and 64 bit word lengths of machines? Give two consecutive addresses for each case.

c. Bring out the five key differences between subroutine and interrupt service routine.

d. What is the function of an assembler directive? Give two examples of assembler directives used for the reservation of memory locations for variables. State their functions.

3. a. Define and explain briefly the following:

i) interrupt.

ii) vectored interrupt.

iii) interrupt nesting.

iv) an exception and give two examples.

b. Explain in brief, with the help of a diagram, the working of daisy chain with multiple priority levels and multiple devices in each level.

4. a. In a computer system, PCI bus is used to connect devices to the processor (system bus) bus. Consider a bus transaction in which the processor reads four 32-bit words from the memory. Explain the read operation on the PCI bus between memory and processor. Give signal and timing diagram.

b. Draw the block diagram of universal bus (USB) structure connected to the host computer. Briefly explain all fields of packets that are used for communication between a host and a device connected to an USB port.


5. a. Define and explain the following :

i) Memory access time                                 ii) Memory cycle time

iii) Random access memory (RAM) iv) Static memories.

b. Differentiate the static RAM (SRAM) and dynamic RAM (DRAM) giving four key differences. State the primary usage of SRAM and DRAM in contemporary computer systems.

c. Define memory latency and bandwidth in case of burst operation that is used for transferring a block of data to or from synchronous DRAM memory unit.

d. Draw a neat block diagram of memory hierarchy in a contemporary computer system. Also indicate relative variation of size, speed and cost per bit, in the hierarchy.

6.a. Explain a simple method of translating virtual address of a program into physical address, with the help of a diagram.

b. Explain structural organization of moving head magnetic hard disk, with multiple surfaces for storage of data. Explain how moving head assembly works for reading data.

c. Answer the following with respect to the magnetic disk, the secondary storage device:

i) seek time

ii) latency

iii) access time

7.a. In carry – look ahead addition, explain generate G, and propagate P, functions for stage 7 with the help of Boolean expression for G, and P,.

b. Perform signed multiplication of numbers -12 and -11 using both multiplication algorithm. Represent the numbers in 5-bits including sign bit. Give booth multiplier recoding table that is used in the above multiplication.

c. Perform division of number 8 by 3 (8 ^ 3) using non-restoring division algorithm.

8. a. Draw the block diagram of the three-bus organization of data path, which providess multipleinternal paths to enable several transfers to take place in parallel. Label the registers and functional components of the processor and their connection to the respective bus of data path.

b. Draw a block diagram of a complete processor and identify the units.

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