VTU Old Exam Papers BE EC 4th Semester
Linear Integrated Circuits and Applications January 2008
Note :1. Answer any FIVE full questions.
2. Any missing data can suitably be assumed with appropriate comments.
1 a. Write the circuit of a differential amplifier with constant-current stage in the emitter circuit and explain. Illustrate the input stage of the OPAMP jiA 741 with a neat circuit diagram.
b. Discuss the pole-zero cancellation technique as applied to an OPAMP with necessary illustrations.
c. A square wave with negligible rise time and a peak-to-peak voltage of 500 mV must be peak-to-peak amplified to 3 volts with a rise time less than 4 microseconds. Can a jaA741 OPAMP be used?
2 a. With neat circuit diagrams for illustration explain the following applications of OPAMP:
i) LOG-Amplifier using two OP AMPS and with a CB transistor in the feed back path.
ii) Ideal Half-wave rectifier.
b. An inverting amplifier configuration is used for summing three input signals of value, Vj -10.5 V, =-2.5 V, and -4 V. The resistance in series with the input voltage sources are R} =5 kCl, R^^IO kQ and R^ ~8 kH respectively. If the feedback resistance for the scheme is 10 kQ, assuming that the OPAMP is very poor and has an open loop gain of only 100, determine the magnitude of the output voltage. The input impedance of the OPAMP is 10 kH.
3 a. What is an instrumentation amplifier? Where does it find use? List its important features.
b. Write the basic circuit diagram of an instrumentation amplifier that uses three OPAMPS and derive the equation for its output voltage if the input voltages are V and .
c. Write the circuit of a differential instrumentation amplifier using a transducer bridge and derive an approximate expression for the output voltage.
4 a. What is an active filter? What are its merits and demerits?
b. Draw the scheme of a second order active low-pass filter and deduce the expression for the magnitude of the transfer function in decibels (dB) in terms of the gain, cut-off frequency and damping co-efficient.
c. Design a third order Butterworth low-pass filter with upper cut-off frequency of one kilohertz.
5 a. What is an ADC? How are ADCs broadly classified? Define and give examples for each type.
b. With a neat circuit for illustration, explain the operation of a three-bit Flash-type ADC. What are the factors that limit the conversion time for the above ADC?
c. Discuss briefly the specifications of ADCs.
6 a. What is a phase-locked loop? Write its block schematic. If the PLL is Iocked-in to the input signal frequency ‘fj’, compute the maximum range of signal frequencies over which the PLL is Iocked-in interms of the phase-angle-to-voltage transfer co-efficient of the phase detector (K^) and the voltage-to-frequency transfer co-efficient of VCO (Kv).
b. With a neat block schematic for illustration explain how a PLL can be used to produce a precise series of frequencies that are derived from a stable crystal controlled oscillator.
c. Illustrate neatly the block diagram and the pin configuration of 565 PLL. List its important features.
7 a. What is a voltage regulator? What do you mean by “fold back current limiting” as applied to a voltage regulator? Explain with necessary illustrations. With usual notations, deduce
the equation for short circuit current limit for linear fold back at V0.
b. Design a 15 V, 50 mA supply using the IC regulator jiA723 DIP unit. Any relevant information can be assumed with appropriate comments.
c. What is a switching regulator? With a neat block diagram, explain the features of a switching regulator.
8. Explain the following:
a. Schmitt trigger using OPAMP.
b. DAC with R-2R ladder.
c. 555 timer as monostable multivibrator.