Mumbai University Question Papers Computer Organisation and Architecture Dec 2012

Mumbai University question papers

 III Sem CSE – Examination DEC 2012

Computer Organisation and Architecture

N.S. : (1) Question No.1 is compulsory.

(2) Attempt any four questions out of remaining six questions.

(3) Draw neat labelled diagram wherever necessary.

(4) Answer to each new question to be started on fresh page.

1. (a) Explain Van-neumann Architecture. 6

(b) Compare Computer Organization and Computer Architecture with example. 4

(c) Explain different Mapping techniques of Cache Memory. 10

2. (a) Compare and contrast DMA, programmed I/O and Interrupt driven I/O.

(b) Compare SRAM and DRAM.

(c) Compare RIse alJd


3. (a) Explain design of control unit with respectto Softwired and Hardwired approach. 10

{b) – Explain IEEE-754-standardformats to represent floating point numbers. 10

4. (a) What is cache coherenoy? Explain differentprotocols to solve cache coherency. 10

(b) Explain Non-Restoring division algorithm for performing 19/4. 10


(a) Explain multiplication of signed numbers -13 *-5

using Booth’s algorithm. 10

(b) What is virtual memory? Explain Role of paging and segmentation in virtual 10

memo~ •

6. (a) Explain SPARC processor in detail. 10

(b) What is the difference between pipelining and parallelism? Show that k-stage 10

pipelinedprocessor has k-!imes speed up as compared to non-pipelinedsystem.

7. Write short notes on following (any four) :-

(a) Wave front Array




(c) Static and dynamic dataflow computer

(d) Systolic processor

(e) I/O~processorand I/O channels –

(1) Characteristics of two level memory.

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