Mumbai University Previous year question papers
III Sem Electronics Examination June 2009
Digital System Design-I
N.S.: (1) Question No.1 is compulsory.
(2) Solve any four questions from remaining six questions.
1. (a) Obtain Hamming code for ‘1011’ data for even parity. Why is Hamming code called error correcting code? Justify.
(b) Simplify following logical expression using Boolean laws
(c) Explain race around condition in master-slave J-K f/f (flipflop).
(d) Explain lockout condition in counter with example.
2. ‘(a) Using k-map simplify the following function and implement it as a SOP. and as a POS f = L m (0, 4, 5, 6, 8, 12, 13, 14)
(b) There are four adjacent parking slot in a company. Each slot is equipped with a special sensor whose output is asserted low when c~r is occupying a slot, otherwise the sensor’s output is high. Design and draw. Schematic for a system, which will generate a low output if and only if there are two or more than two adjacent slots vaccarit.
3. (a) Implement f =1t m(O, 1, 4, 5, 7) using 4 : 1 multiplexer.
(b) Using Quine McClusky method of minimization solve
f(A, B, C, D) = L m (0, 1,3,4,5,7, 10, 13, 14, 15).
4. (a) Implement 9-bit odd parity checker circuit using IC = 74180. 10
(b) Explain comparator chip IC 7485. Design 12-bit comparator circuit using three ‘7485’ IC.
5. (a) Convert:
(i) SRFF TO TFF
(ii) JKFF TO SRFF.
(b) Design mod-10 asynchronous counter using J-K flip-flop.
6. (a) Design 3-bit Up/Down synchronous counter using T-f/f.
(b) Explain working of 4-bit ring counter. Draw its timing diagram.
7. (a) Draw a neat circuit diagram of 2 inputTTL NAND gate and explain its operation. 10
(b) What is static hazards in a combinational digital circuit? How it can be avoided?