JNTU question papers B -Tech – VLSI design – Aug/Sep 2008

JNTU III B.Tech Supplimentary Examinations, Aug/Sep 2008

VLSI DESIGN

( Common to Electronics & Communication Engineering, Bio-Medical

Engineering and Electronics & Telematics)

SET-II

1. Write in detail about integrated passive components.

 

2. (a) Explain various regions of CMOS inverter transfer characteristics.

(b) For a CMOS inverter, calculate the shift in the transfer characteristic curve when ?n/?p ratio is varied from 1/1 to 10/1.

 

3. (a) Write the scaling factors for different types of device parameters.

(b) Discuss the limits due to sub threshold currents.

 

4. Describe three sources of wiring capacitances. Explain the effect of wiring capacitance on the performance of a VLSI circuit.

 

5. (a) Draw the schematic for tiny XOR gate and explain its operation.

(b) Draw the circuit diagram for 4-by-4 barrel shifter using complementary transmission gates and explain its shifting operation.

 

6. (a) Draw and explain the Antifuse Structure for programming the PAL device.

(b) Explain how the I/O pad is programmed in FPGA.

 

7. (a) Compare the Hardware and Software Languages.

(b) Draw the basic design flow through typical CMOS VLSI tools and give some names of corresponding tools.

 

8. (a) What type of defects are tested in manufacturing testing methods?

(b) What is the Design for Autonomous Test and what is the basic device used in this?

(c) What type of tests are used to check the noise margin for CMOS gates?

Leave a Comment