# JNTU Papers BTech,i Semester Linear And Digital Ic Application November 2008

JNTU PAPERS

JNTU, B.Tech,I-Semester  Linear And Digital Ic Application November 2008

( Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) SET-3

1. (a) Why is emitter resistor RE replaced by a constant current bias circuit in differential amplifier stage of an OP-AMP? 

(b) Explain why open loop configurations are not used in linear applications 

(c) For an OP-AMP, PSRR=70dB(min),CMRR=105,differential mode gainAd=105.

The output voltage changes by 20V in 4 microseconds. Calculate i)numerical

value of PSRR ii) Common mode gain iii) Slew rate of the OP-AMP. 

2. (a) Define slew rate and derive the expression for it. List causes of the slew rate

and explain its significance in applications 

(b) Explain the difference between slew rate and transient response 

3. (a) What feedback is preferred for oscillators and why? What is the effect of

negative feedback? 

(b) Design an OP-AMP based relaxation oscillator and derive the frequency of

oscillation. 

4. (a) Explain the operation of Monostable multivibrator using 555 timer. Derive

the expression of time delay of a Monostable multivibrator using 555 timer.



(b) Design a Monostable multivibrator using 555 timer to produce a pulse width

of 100 m sec. 

5. (a) Give the functional block diagram of NE 565 PLL (DIP) and for the given

component values. C1 = 390PF, C2 = 680PF and R1 = 10k, Vcc = ±6V

Find 

i. The free running frequency

ii. The lock range and capture range

Where C1 is the capacitor connected between pin number 9 and ?VCC , C2 is

the capacitor connected between +VCC and output pin 7, and R1 is connected

between pin number 8 and +VCC

(b) Give the functional block diagram of VCO NE566 and explain its working and

6. (a) Explain the design procedure (with suitable circuit diagram of a fourth order

Butterworth low-pass filter). 

(b) A certain narrow band-pass filter has been designed to meet the following

specifications: fC=2kHz. Q=20, and Ap=10. What modifications are neces-

sary in the filter circuit to change the center frequency ‘fc’ to 1kHz, keeping

the gain and band-width constant? 

7. (a) What is meant by Tri-state logic ? Draw the circuit of Tri-state TTL logic

and explain its functions. 

(b) Draw the circuit of ECL logic OR/NOR gate and explain its functions. 

8. (a) Draw the circuit of a Weighted Resistor DAC and obtain expression for n-bits.

(b) Sketch the Analog output voltage for the given digital input code. 

(c) What are the major disadvantages in this type