JNTU III B.Tech Supplimentary Examinations, Aug/Sep 2008

JNTU III B.Tech Supplimentary Examinations, Aug/Sep 2008

MICROPROCESSORS AND INTERFACING

SET-III

1. (a) Compare 8 bit processors and 16 bit processors from the architectural view.

(b) Explain Overflow condition with 8 bit signed data. Generate Overflow flag using other flags of 8086?

2. (a) Explain with example how a far procedure is declared as PUBLIC? Show how an external near procedure is called in main program?

(b) Discuss the assembler directives with examples?

 

3. The I/O circuitry in an 8086 based system consists of five I/O devices with one status signal for each device. Design the required hardware providing two address locations to each device, one for status and other for data. In the range 0F00H to 0FOFH. Write an instruction sequence to test the status of each device and store it.

 

4. (a) How do you interface ADC to microprocessor? Give the required instruction sequence to acquire one sample from ADC?

(b) Discuss different types of relays for switching larger currents?

 

5. (a) Explain different modes of DMA transfer supported by 8237?

(b) Draw the block diagram of 8251 and explain each block?

 

6. (a) Draw the block diagram of 8259 and explain each block?

(b) Explain how IRET instruction is executed?

 

7. (a) Explain the following terms with reference to DRAM

i. Write cycle

ii. Access time

iii. Refresh

iv. Read cycle

(b) Design the required logic to generate read, write control signals for memory and I/O in a target system using 8086 microprocessor? Generate bank select signals for even and odd address memory banks?

 

8. Interface two 8255’s to 8051 with starting address of 0FFF0H? Show the hardware design? Write the instruction sequence to initialize all ports of 8255?s as input ports in mode 0.

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