JNTU B Tech ii Semester Examinations,Computer Organization, Apr/May 2008

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JNTU B.Tech II Semester Examinations,

                                                                                                       Computer Organization

Apr/May 2008

(Mechatronics)

Time: 3 hours Max Marks: 80

Answer any FIVE Questions

All Questions carry equal marks

SET-III

1. (a) Explain about various buses such as internal, external, backplane, I/O, system,

address, data, synchronous and asynchronous.

(b) Explain about daisy chain based bus arbitration. [16]

 

2. Design a circuit for parallel load operation into one of the four 4-bit registers from a bus. Mention clearly control/selection bits and selection logic. Assume D flip-flops. [16]

 

3. (a) Support or oppose the statement. If we want to add a new machine language

instruction to a processor instruction set, simply write a C program and compile and store the resultant code in control memory?. [8]

(b) Support the statement Instruction Set Architecture has impact on the processors microarchitecture. [8]

 

4. (a) Draw a flowchart to explain how addition and subtraction of two fixed point numbers can be done. Also, draw a circuit using full adders for the same. [8]

(b) Explain Booth’s logorithm with its theoretical basis. [8]

 

5. Explain the following:

(a) Optical Disc

(b) Cache Memory

(c) RAID technology. [5+5+6]

 

6. What are the different modes of data transfer? Explain each mode in detail. [16]

 

7. (a) What is pipelining? Explain. [8]

(b) Show space-time diagram for pipeline. Explain with an example. [8]

 

8. (a) Explain the working of 8 x 8 Omega Switching network.

(b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a neat sketch. [8+8]

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