JNTU B.Tech II Semester Examinations, COMPUTER ORGANIZATION, Apr/May 2008

JNTU B.Tech II Semester Examinations, COMPUTER ORGANIZATION, pr/May 2008

(Mechatronics)

Time: 3 hours Max Marks: 80

Answer any FIVE Questions

All Questions carry equal marks

SET-II

1. (a) Explain the terms computer architecture, computer organization and computer design in a detailed fashion. [8]

(b) Explain about MIPS, FLOPS rating of a processor. How do we arrive at these values. [8]

 

2. (a) Design a circuit transferring data from a 4bit register which uses D flip-flops to another register which employs RS flip-flops. [8]

(b) What are register transfer logic languages? Explain few RTL statement for branching with their actual functioning. [8]

 

3. (a) Explain nanoinstructions and nanometry. Why do we need them? [8]

(b) Describe advantages and disadvantages of horizontal and vertical microcoded systems. [8]

 

4. (a) How many bits are needed to store the result addition, subtraction, multiplication and division of two n-bit unsigned numbers. Prove. [8]

(b) What is overflow and underflow? What is the reason? If the computer is considered as infinite system do we still have these problems. [8]

 

5. (a) Compare and contrast FIFO and LRU Cache Replacement Algorithms.

(b) Compare and contrast direct and associative mapping Techniques. [8+8]

 

6. What are the different kinds of I/O Communication techniques? What are the relative advantages and disadvantages? Compare and contrast all techniques. [16]

 

7. (a) Explain SIMD and MIMD processors in detail.

(b) Explain array processors. [8+8]

 

8. (a) Explain the working of 8 x 8 Omega Switching network.

(b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a neat sketch. [8+8]

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