# GTU exam paper of digital logic design

**GUJARAT TECHNOLOGICAL UNIVERSITY**

**B.E. Sem-III Regular / Remedial Examination December 2010**

**Subject code: 13 01**

**Subject Name: Digital Logic Design**

**Instructions:**

**1. Attempt all questions.**

**2. Make suitable assumptions wherever necessary.**

**3. Figures to the right indicate full marks.**

**Q.1 (a) **Convert the following Numbers as directed:

(1) (52)10 = ( )2

(2) (101001011)2 = ( )10

(3) (11101110) 2 = ( )8

(4) (68)10 = ( )16

**(b) **Reduce the expression:

(1) A+B(AC+(B+C’)D) (2) (A+(BC)’)’(AB’+ABC)

**Q.2 (a) **Simplify the Boolean function:

(1)F(w,x,y,z) = Σ (0,1,2,4,5,6,8,9,12,13,14)

(2)F(w,x,y) = Σ (0,1,3,4,5,7)

**(b) **Explain with figures how NAND gate and NOR gate can be used as Universal gate. ** **

**OR**

**(b) **Simplify the Boolean function:

(1) F = A’B’C’+B’CD’+A’BCD’+AB’C’

(2) F =A’B’D’+A’CD+A’BC

d=A’BC’D+ACD+AB’D’ Where “d ” indicates Don’t care conditions.

**Q.3 (a) **With logic diagram and truth table explain the working of 3 to 8 line decoder. ** **

**(b) **With logic diagram and truth table explain the working JK Flipflop.Also obtain its characteristic equation. How JK flip-flop is the refinement of RS flip-flop?

**OR**

**Q.3 (a) **Design a counter with the following binary sequence:

0, 4,2,1,6 and repeat. Use JK flip-flops

**(b) **With logic diagram and function table explain the operation of 4 to 1 line multiplexer.

**Q.4 (a) **What is the function of shift register? With the help of simple diagram explain its working. With block diagram and timing diagram explain the serial transfer of information from register A to register B.

** **

**(b) **With respect to Register Transfer logic, explain Interregister Transfer with necessary diagrams.

**OR**

**Q.4 (a) **With logic diagram explain the operation of 4 bit binary ripple counter. Explain the count sequence. How up counter can be converted into down counter?

** ****(b) **Prepare a detailed note on: Instruction Codes. ** **

**Q.5 (a) **What is scratchpad memory? With diagram explain the working of a processor unit employing a scratchpad memory.

** ****(b) **Briefly explain control organization. With diagram explain control logic with one flip-flop per state.

**OR**

**Q.5 (a) **Draw the block diagram of a processor unit with control variables and explain its operation briefly.

**(b) **With simple diagram explain the working of control logic with sequence register

and decoder.