# GTU Digital Logic Design Question Paper May 2011

## Digital Logic Design

Subject code: 130701     Subject Name: Digital Logic Design

Total Marks: 70

Instructions:

1. Attempt all questions.
2. Make suitable assumptions wherever necessary.
3. Figures to the right indicate full marks.

(i)   Draw symbol and construct the truth table for three input Ex-OR gate.

(ii)   What is the principle of Duality Theorem?

(iii)   Explain briefly: standard SOP and POS forms.

(iv)   What are Minterms and Maxterms ?

(v)  Define: Noise margin , Propagation delay

(vi)   Give comparison between combinational and Sequential logic circuits

(vii)   What is race-around condition in JK flip-flop?

Q.2 (a) (i) Explain NAND and NOR as an universal gates                                      (04) 07

(ii) Convert decimal 225.225 to binary ,octal and hexadecimal (03)

(b) (i) Implement Boolean expression for Ex-OR gate using NAND gates only 07

(04)

(ii) convert decimal 8620 into BCD , excess-3 code and Gray code.

(03)

OR

(b) (i) Simplify the following Boolean function using K-map                                        07

F( w,x,y,z) = £( 1 , 3 , 7 , 11 , 15 )                                                     (04)

with don’t care conditions d( w,x,y,z ) = £( 0, 2 ,5 )

(ii) Draw logic diagram , graphical symbol , and

Characteristic table for clocked D flip-flop                                        (03)

Q.3 (a) Design a combinational circuit whose input is four bit binary number and 07 output is the 2’s complement of the input binary number.

(b) Design a full-adder with two half-adders and an OR gate                                         07

OR

Q.3 (a) Design a BCD to decimal decoder                                                                                07

(b) What is multiplexer? Implement the following function with a multiplexer: 07

F(A,B,C,D) = (0 , 1 , 3 , 4 , 8 , 9 ,15 )

Q.4 (a) Write short note on : Read Only Memory (ROM)                                                         07

(b) A combinational circuit is defined by functions:                                                      07

F1(A,B,C) = ( 3 , 5 , 6, 7 )

F2(A,B,C) = ( 0 , 2 , 4, 7 )

Implement the circuit with PLA having three inputs four product term and two outputs

OR=

Q.4 (a) Give classification of counters and explain asynchronous                                            07

4-bit binary ripple counter

(b) Explain briefly:

(i)   logic and shift micro-operations

(ii)   fixed-point binary data and floating-point data

Q.5 (a) Draw block diagram of a 4-bit arithmetic logic unit. Design an 07 adder/subtractor circuit with one selection variable S and two inputs A and B .when S = 0 circuit performs A+B, when S = 1 circuit performs A – B by taking the 2’s complement of B

(b) Draw and explain block diagram of microprogramming

control.                                                                                                                                     07

OR

Q.5 (a) Simplify the following Boolean function using tabulation Method and 07 draw logic diagram

using NOR gates only F(w,x,y,z ) = X( 0 ,1 , 2 , 8 ,10 ,11,14,15 )

(b) Explain working of master-slave JK flip-flop with necessary logic diagram 07 ,

state equation and state diagram.