GTU Computer Organization and Architecture Exam Paper Dec 2009

GTU Computer Organization and Architecture Exam Paper Dec 2009


B.E. Sem-III Examination December 2009

Subject code: 130704

              Subject Name: Computer Organization and Architecture         

                                                             Total Marks: 70


  1. Attempt all questions.
  2. Make suitable assumptions wherever necessary.
  3. Figures to the right indicate full marks.




Answer the following questions.

  1. What is register transfer language? Clear it with example.
    1. Explain the operation of three state bus buffers and show its use in design of common bus.

(b)    Explain the direct and indirect address with example and compare them.

Q.2  (a) Draw the circuit for control unit of basic computer and explain its working.

(b)  What do you mean by completeness of instruction set? Give the reasons to choose the instructions in each category.


(b) Write a program loop using a pointer and a counter to clear the contents of hex locations 500 to 5FF with 0.

Q.3 (a)  Compare the following.

  1. Microprogrammed and hardwired control organization.
  2. Register reference and memory reference instructions.

(b)   Describe the first pass of assembler with the help of flowchart and show how symbol table is generated using an example.


Q.3  (a)  What is program interrupt? What happens when it comes? What are the tasks to be performed by service routine?

(b)  Describe the following terms with proper example in each case: micro operation, microinstruction, microprogram, microcode.

Q.4  (a)  What is stack? Give the organization of register stack with all necessary elements and explain the working of push and pop operations.

(b)   List the important characteristics of RISC architecture and explain the use of overlapped register windows.


Q.4  (a) What are the flag bits? Give the meaning of each and use of them in programming.

(b)  Explain the following.

1.Data transfer instructions. 2.Flynn’s classification of computers.

Q.5 (a)  What are the pipeline conflicts? Explain the hardware techniques to 07 handle the branch instructions.

(b) Multiply the (-8) with (12) using Booth’s algorithm. Give each step. 07


Q.5  (a)  Considering three segment instruction pipeline, illustrate the concepts of 07 delayed load and delayed branch with example.

(b)  Explain the Booth’s algorithm with the help of flowchart.                        07

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