Anna University Model Question Paper BE V sem E&I DIGITAL SIGNAL PROCESSING


B.E. Electronics and Instrumentation Engineering

V Semester



Time : 3 Hours                                                                    Max. Marks : 100 marks


Answer all questions


PART – A (10 x 2 = 20 marks)


PART-A                                              10 x 2 = 20 Marks


  1. Differentiate between analog and digital signal. Why Digital signal processing is widely used than analog signal processing.
  2. State Shannon’s Sampling theorem.
  3. Determine the Z-transform of (1/2)n[ u[n]-u[n-8]] and indicate its ROC.
  4. Compare FIR and IIR filter.
  5. What are the advantages of linear phase characteristics? Which systems exhibit linear phase?
  6. Show that the system described by the difference equation is an all pass system

3 y(n) – y(n-1) = -x(n) + 3x(n-1)

  1. Mention few application areas where speech coding is required.
  2. Explain the circular addressing mode of DSP processor
  3. Find the DFT of the signal x(n)= {1,3,5,7}.
  4. Distinguish between recursive and non-recursive realizations of filters.


                                                       PART-B   (5×16 = 80 Marks)


11.i)     Show that Z-Transform of x*(n) is X*(z*).                                                              (4)

    ii)     Consider a linear shift-invariant discrete system with input x(n) and output y(n) for which

y(n-2) – 2.5 y(n-1) +y(n) =x(n)

By considering the pole-zero pattern associated with the difference equation, determine the three possible choices for the unit-sample response of the system. Comment on the stability of the system in each case.                                            (12)


12.a)i)  Find the DFT of the sequence {1,1,1,1,2,2,2,2} using radix-2 Decimation-in-Time FFT. Sketch the magnitude and phase plot.                                                            (12)


       ii)  What is the need for FFT?                                                                                        (4)




12.b)i) Find the DFT of the sequence {1,1,1,1,2,2,2,2} using radix-2 Decimation-in-Frequency FFT.                                                                                                       (12)


       ii) Write about over lap save method.                                                                           (4)


13.a) The specification of the desired low pass filter are:

                  Amin = 22 dB   and Amax = 3 dB   ωp  = 0.2П and ωs = 0.4П

Design a Butterworth digital filter using Bilinear Transformation. (Amin and Amax are attenuation)                                                                                                                (16)




13.b)    Design and also realize a high pass FIR filter with a cutoff frequency of 1.3 rad/sec   and N=9.                                                                                                             (16)

14.a)i)  Perform the linear convolution of (1/4)n u(n) and (1/2)n u(n).                                 (6)


     ii)    Is it possible to perform linear convolution through circular convolution. If so how?


    iii)    Find the Discrete Fourier Series of the following periodic sequence. (8)






14.b)i)    Explain about the Frequency Transformation that will be adopted in IIR filter design.                                                                                                                     (4)


       ii)    The specification of the desired low pass digital filter are

                      Amin = 12.4 dB   and Amax = 0.915 dB   ωp  = 0.25П and ωs = -0.5П

            Design a Chebyshev digital filter using impulse invariant transformation. (Amin and                  Amax are attenuation).                                                                                              (12)  Highlight the special blocks of the Digital Signal Processor Architecture over the regular Micro-Controller based Architectures.                                                       (16)




15.b)i)  Explain how bit-reversal is achieved in the Texas based DSP Processor.               (8)


       ii)  Show that FFT can be evaluated with lesser machine cycles using DSP processor                   compared to any of Micro-controller.                                                                       (8)



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