WBUT Exam Papers EE Basic Electrical And Electronic EngineeringI B Tech 2nd Sem 2012
WBUT Exam Papers EE
Basic Electrical And Electronic EngineeringI B Tech 2^{nd} Sem 2012
( EE PART )
Full Marks : 35
The figures in the margin indicate full marks.
Candidates are required to give their answers in their own words
as far as practicable. _{t}
GROUP – A ( Multiple Choice Type Questions )
1 Choose the correct alternatives for any five of the following : 5×15
i) In a three phase balanced system, line voltage makes an angle with phase voltages
a) 30° *>) ^{60}°
c) 90° , ^{120}°
f* <
ii) The speed in which stator magnetic field rotates is called
a) actual speed
synchronous speed
c) slip speed
d) supersynchronous speed.
ili) If a d.c. series motor is started at no load, the speed will be
a) rated speed
b) zero
d) half of the rated speed.
iv) If two static charges having magnitude 1 coulomb each
are placed at 1 m apart in space, the electrostatic force developed between the charges is
a) 90 x 10 ^{0} newtons Jrf) 9 x 10^ newtons
c) 09 x 10^{J} newtons d) 0.
v) The regulation of a transformer is negative, if the load at the secondary side is
a) resistive
b) inductive
‘c) capacitive
d) combination of resistive, inductive & capacitive, vi) Which of the following in a fourwire system ?
a) Delta with neutral
b) Star with neutral
c) Both delta & star
d) Any combination of four wires.
Answer any two of the following. 2×5= 10
Prove that the efficiency of transformer is maximum when iron loss is equal to copper loss.
Derive an expression for capacitance of a cylindrical capacitor, assuming grounded outer surface.
What is a threephase balanced A.C. system ? Show that, in
a threephase balanced a.c. circuit, the sum of current in the neutral is zero.
5. Derive the expression of torque of a ci.c.
GROUP C
Answer any two of the following. 2×10 = 20
6 a) Explain the principle of operation of a transformer under loaded condition.
b) A 200 kVA transformer has 400 turns on the primary & 40 turns on the secondary winding. The primary is connected to 2 ‘kV, 50 Hz supply. Find the full load primary & secondary current, secondary emf & the maximum flux in the core. Neglect leakage drop & noload primary current. , ~
4 + b
7. j#’ Explain the open circuit characteristics ( OCC ) of a DC generator.
bj An 8pole, 400 V shunt motor has 960 wave connected armature conductors. The full load armature current is 40 A & flux per pole is 0 02 Wb. The armature resistance is 01 Q and the contact drop is 1 V per brush. Calculate the full load speed of the motor.
c) Why starter is needed to start a d.c. motor ?
!024
° [ Turn over
8 a) A threephase Induction motor is self starting. Explain.
Obtain the relation between the slip and frequency of the rotor induced ernf. ~
A 4pole, 3phase, 275 kW, 440 V, 50 Hz induction gig or in running with a slip of 4%. Find_____ –
i) synchronous speed
ii) rotor speed
m) frequency of the rotor induced ernf. < 3 + 2 + 5
Explain the principle of measurement of balanced
^{P P}°^{wer} ^ 2Wattmeter method. Draw the neat circuit & phasor diagrams.
These equal impedances ( 6 + j_{8} ) £2 are connected a cross a 400 V, 3phase, 50 Hz supply. Calculate 1
») the line current & the phase current W) power factor
Hi) active & reactive drawn by load per phase. 5 +
, Full Marks : 35
The figures in the margin indicate full marks.
Candidates are required to give their answers in their own words
as Jar as practicable.
GROUP – A { Multiple Choice Type Questions )
1. Choose the correct alternatives for any fwe of the following _{: s x }_{i}_{ = s}
i) An ideal OpAmp is an ideal
a) voltage controlled current source
^ voyage controlled voltage source
c) current controlled current source
d) current controlled voltage source.
11) The AND function can be realized by using only n number of NOR gates. What is n equal to ?
a) ^{2} b) 3
d)
iii) The Boolean expression ABC + ABC + ABC + ABC is of
yrf OR gate b) AND gate
c) EXNOR gate d) EXOR gate.
iv) Which of the following statements is/are correct in
regard to excess 3 code ?
I
a) It is a BCD code
b) It is an unweighted code
c) It is a self complementing codc
d) All of these.
v) In Barkhausen criterion, phase of Aji is a) 0°
Iff multiple of 180° u
c) 0° or multiple of 180^{c}
d) 0° or multiple of 360^{c}
vi) In inverting amplifier circuit if input & feedback resistances are 1 kQ and 3 kQ, respectively, i/p voltage is 3 volt and power supply voltage is ± 6V, then thf output voltage of OpAmp is
a) – 6 volt b) +6 volt
– 9 volt d) +9 volt.
Answer any two of the following. 2×5= 10
2/ Mention the advantages and disadvantages of negative feedback amplifier.
Dis< ,ss the operation of opamp as an integrator.
Implement the function F = (AB + CD) using NAND
gates.
^{bl} (^{1I011})_{2} (?),o
=
“‘rite down the basic difference between enhancement type and depletion type MOSFETs.
a i What is virtual ground of an OpAmp ?
bl Draw and explain the voltage comparator circuit using OpAmp. _{ }
GROUP C
Answer any two of the following. 2 x 10 = 20
What is the effect of negative feedback on output impedance and phase distortion ?
bl An amplifier has a voltage gain of 100. The feedback ratio is – 0 04. Find
i the voltage gain with feedback
ii) the amount of feedback in dB
«i) the output voltage of the feedback amplifier for an input voltage of 40 raV
iv) the feedback factor
vj the feedback voltage.
7. . al Explain the basic operation of depeletion type n channel MOSFET with a suitable diagram.
What are the basic differences between BJT and FET ?
c) /As V_{gs} is changed from 0 V to 02 V keeping V_{DS} constant, I_{D} of the FET drops from 10*25 mA to
965 mA. What is the transconductance of the FET ? If the a.c. drain resistance is 32 k£2, find also the amplification factor of the FET.
d) What do you mean by pinch off voltage for nchannel JFET ? 4 + 2 + 2 + 2
a) If the feedback resistance R j. is replaced by a diode for
a negative feedback amplifier using OpAmp, then derive the expression of o/p voltage v_{q} for it. Also,
 

b) For the given circuit find the output voltage v .
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9. Write short notes on any two of the following : 2×5
a) Topologies of feedback amplifier
b) Summing amplifier
c) CMOS
d) Design of exclusiveOR gate.