VTU Previous Exam Papers BE CS 4th Semester Computer Organization July 2009

VTU Previous Exam Papers BE CS 4th Semester

Computer Organization July 2009

 

PART-A

1 a. Explain the function of processor registers with a block diagram.

b.  Write the basic performance equation. Explain the role of each of the parameters in the equation on the performance of the computer.

c.   Show how the operation C ~ A + B can be implemented in a single accumulator computer by (i) Three-address instruction (ii) Two-address instruction (iii) One-address instruction

 

2  a. What is an addressing mode? Explain register, indirect, index addressing modes with an example for each.

b.  What is subroutine linkage? Explain with an example, subroutine linkage using linkage register.

c.   Register R1 and R2 of computer contain the decimal value 1200 and 4600. What is the effective address of the source operand in each of the following instructions?

i)    Load 20(R1), R5

ii)   Hove# 3000, R5

iii)  Store R5, 30(R1, R2)

iv)  Add -(R2), R5

v)   Subtract (Rl)+, R5

3 a. Explain with a diagram, how interrupt request from several I/O devices can be communicated to a processor through a single INTR line.

b.  How can the processor obtain the starting address of different interrupt-service routines using vectored interrupts?

c.   Why is bus arbitration required? Explain with block diagram bus arbitration using Daisy chain.

 

4 a. Explain with a block diagram a general 8 bit parallel interface.

b. With the help of data transfer signals explain how a real operation is performed using PCI bus.

c.   Explain briefly bus arbitration phase in SCSI bus.

PART-B

 

5 a.Draw the organization of a IK x 1 memory cell and explain its working.

b.  Explain the working of a single-transistor dynamic memory cell.

c. Calculate the average access time experienced by a processor if a cache bit rate is 0.88, miss penalty is 0.015 milliseconds and cache access time is 10 microseconds.

 

6 a. Show the organization of virtual memory address translation based in fixed-Length pages and explain its working.

b. How can performance and reliability be improved using RAID technology?

c. Explain the design of a 4-bit carry-look ahead adder.

7  a.Explain Booth’s algorithm. Multiply OHIO (+14) and 11011 (-5) using Booth’s multiplication.

b. Write the algorithm for binary division using restoring division method.

c.   List the rules for addition, subtraction, multiplication and division of floating point numbers.

 

8 a. Write and explain the control sequences for execution of an unconditional branch instruction.

b.  Explain with block diagram the basic organization of a micro programmed control unit.

c.   What are the modifications required in the basic organization of a micro programmed control unit to support conditional branching in the micro program.

 

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