VTU Previous Exam Papers BE CS 4th Semester Computer Organization Jan 2008

VTU Previous Exam Papers BE CS 4th Semester

Computer Organization Jan 2008

 

1 a. Describe the basic functional units of a computer using a schematic.

b.  Program execution time is defined by T = N*S/R. A program can be run on a RISC or a CISC computer. Both computers use pipelined instruction execution. Effective value of S in T for RISC machine is 1.2 but it is only 1.5 for CISC machine. Both machines have the same clock rate R. Find the value of N on the CISC machine as a percentage of N for the RISC machine if the time for execution on both the machines is the same. Recalculate the ratio if the clock rate R for the RISC machine is 15% higher than for the CISC machine.

c. Explain the following with reference to 2’s compliment arithmetic:

i) Sign extension ii) Arithmetic overflow.

2 a. Write an assembly language program to add a list of numbers using indirect addressing.

b. Explain the concept of stack frames when subroutines are nested.

c.   The return address of a subroutine could be saved: i) In a processor register ii) In a memory location associated with the call so that a different location is used when the subroutine is called from the different places iii) On a stack. Which of the above mentioned possibilities supports subroutine nesting and which supports subroutine recursion?

 

3  a. What is the need for disabling interrupts? What are the different ways in which interrupts can be disabled and enabled?

b.  Draw neat timing diagrams and explain: i) Multicycle synchronous bus transfer for a read operation ii) Asynchronous bus transfer for a write operation.

 

4 a. Three devices A, B and C are connected to the bus of a computer. I/O transfers for all three devices use interrupt control. Interrupt nesting for devices A and B is not allowed. But interrupt requests from C may be accepted while either A or B is being serviced. Suggest different ways in which this can be accomplished in the following cases:

i)   The computer has one interrupt request line

ii)  Two interrupt request lines INTR1 and INTR2 are available with INTR1 having higher priority.

Specify when and how interrupts are enabled and disabled in each case.

b. Explain the different phases in the operation of the SCSI bus.

c. Draw the block diagram of a 8Mx32 memory using 512Kx8 memory chips.

 

5 a. Explain the working of a dynamic memory cell.

b. Explain how an address generated by the processor gets translated into a main memory address.

C. A block-set-associative cache consists of a total of 64 blocks divided into 4-block sets. The main memory contains 4096 blocks each consisting of 128 words.

i) How many bits are there in the main memory address?

ii) How many bits are there in each of the TAG, SET and WORD fields?

 

6 a. Explain the circuit arrangement that implements restoring division.

b.  Let multiplicand A = 110101 and multiplier B – 011011. Multiply the given signed 2’s compliment numbers using booth algorithm. Verify the result using bit pairing of the multiplier.

c.   Let floating point numbers be represented in a 12-bit format consisting of one bit for the sign, five bits for excess-15 exponent with two end values 0 and 31 signifying 0 and infinity respectively and six bits for the fractional mantissa normalized as in the IEEE format with an implied 1 to the left of the binary point.

i) Represent 12.125 in this format.

ii) What are the smallest and largest numbers that can be represented in this format?

 

7 a. Draw a neat block diagram and explain the single bus organization.

b. List out the advantages and limitations of a hard-wired control unit. Explain the organization of a micro-programmed control unit.

 

8 Write notes on:

a. UB architecture

b. Compact Disk (CD) technology

c. Digital camera as an example of an embedded system d. Carry look-ahead addition.

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