VLSI Design Syllabus for JNTU

VLSI Design Syllabus for JNTU

 JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY
KAKINADA
III Year B.Tech EEE II-Sem T P C
4+1* 0 4
VLSI DESIGN
UNIT I
INTRODUCTION : Introduction to IC Technology – MOS, PMOS, NMOS, CMOS & BiCMOS technologies-
Oxidation, Lithography, Diffusion, Ion implantation, Metallisation, Encapsulation, Probe testing, Integrated
Resistors and Capacitors.
UNIT II
BASIC ELECTRICAL PROPERTIES : Basic Electrical Properties of MOS and BiCMOS Circuits: Ids-Vds
relationships, MOS transistor threshold Voltage, gm, gds, figure of merit o; Pass transistor, NMOS
Inverter, Various pull ups, CMOS Inverter analysis and design, Bi-CMOS Inverters.
UNIT III
VLSI CIRCUIT DESIGN PROCESSES : VLSI Design Flow, MOS Layers, Stick Diagrams, Design Rules
and Layout, 2 m CMOS Design rules for wires, Contacts and Transistors Layout Diagrams for NMOS
and CMOS Inverters and Gates, Scaling of MOS circuits, Limitations of Scaling.
UNIT IV
GATE LEVEL DESIGN : Logic Gates and Other complex gates, Switch logic, Alternate gate circuits,
Basic circuit concepts, Sheet Resistance RS and its concept to MOS, Area Capacitance Units,
Calculations – – Delays, Driving large Capacitive Loads, Wiring Capacitances, Fan-in and fan-out,
Choice of layers
UNIT V
SUBSYSTEM DESIGN : Subsystem Design, Shifters, Adders, ALUs, Multipliers, Parity generators,
Comparators, Zero/One Detectors, Counters, High Density Memory Elements.
UNIT VI
SEMICONDUCTOR INTEGRATED CIRCUIT DESIGN : PLAs, FPGAs, CPLDs, Standard Cells,
Programmable Array Logic, Design Approach.
UNIT VII
VHDL SYNTHESIS : VHDL Synthesis, Circuit Design Flow, Circuit Synthesis, Simulation, Layout, Design
capture tools, Design Verification Tools, Test Principles.
UNIT VIII
CMOS TESTING : CMOS Testing, Need for testing, Test Principles, Design Strategies for test, Chiplevel
Test Techniques, System-level Test Techniques, Layout Design for improved Testability.
TEXTBOOKS :
1. Essentials of VLSI circuits and systems – Kamran Eshraghian, Eshraghian Dougles and A. Pucknell,
PHI, 2005 Edition.
2. Principles of CMOS VLSI Design – Weste and Eshraghian, Pearson Education, 1999.
REFERENCES :
1. Chip Design for Submicron VLSI: CMOS Layout & Simulation, – John P. Uyemura, Thomson
Learning.
2. Introduction to VLSI Circuits and Systems – John .P. Uyemura, JohnWiley, 2003.
3. Digital Integrated Circuits – John M. Rabaey, PHI, EEE, 1997.
4. Modern VLSI Design – Wayne Wolf, Pearson Education, 3rd Edition, 1997.
5. VLSI Technology – S.M. SZE, 2nd Edition, TMH, 2003.

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