UPTU Previous Year Question Papers
B Tech 1st Year
Electronics Engineering 2006-07
Notes : (1) Attempt all questions.
(2) Number of parts to be attempted from each question are indicated.
1 Answer any four parts from the following :
(a) Comment on any two from the following statement :
(i) Electron and hole recombine and disappear.
(ii) An intrinsic semiconductor have equal number of electrons and holes.
(iii)A semiconductor behaves like an insulator at 0°k and becomes conductor at room temperature.
(b) Draw the V-I characteristic of p-u junction diode. Write the current-voltage equation, specify all terms of equation. Discuss its temperature dependance.
(c) Discuss the capacitive effect of p-u junction under reverse bias. What will happen to capacitance if the polarity of the applied voltage is changed explain ?
(d) At what voltage the reverse current flowing through a germanium diode will reach 90% of it’s saturation value at room temperature 27°C ?
(e) Define static and dynamic resistance of diode. How it can be obtained ?
(f) Calculate V_{0} and I_{D} for the circuit given in fig. 1.
2. Attempt any two parts from the following
(a) (i) Draw the circuit diagram of a full wave rectifier with 7t filter whose PIV = Vm.
(ii) Define voltage regulation. Derive the expression for regulation and show that it is same in Half wave rectifier and full wave rectifier.
(b) (i) What is the difference between avalanche breakdown and zener breakdown of a p-u junction ? Draw the circuit diagram of voltage regulator using zener diode.
(ii) Calculate the V_{DC}, I_{DC}, V_{r(rms)}, I_{ms} through 1 kohm load connected to half wave rectifier circuit shown in fig. 2
(c) (i) Prove that maximum d.c. output power occurs in half wave rectifier when R_{f} = R_{l}.
(ii) Write short notes on any two of the following :
(i) Voltage multiplier circuit using diodes.
(ii) Clipping circuits
(iii) Different type of filters used in rectifiers.
3. Attempt any two parts from the following :
(a) (i) Draw the output characteristic curve of n-p-n transistor in CE configuration level the parameters and indicate different regions of operation.
(ii) A germanium transistor used in an amplifier has a collector cut off current I_{C}q ^{=} 10 |^A at a temperature of 20°C and h_{FE} = 50, find collector current when.
(i) The Base current is 0.25 mA.
(ii) Assuming h_{FE} does not increase with temperature and temperature rises to 50°C.
(b) (i) What do you understand by “Transistor biasing” ? Mention the important points to be considered for the selection of operating point.
(ii) A Germanium transistor with 0-49 has the potential divider arrangement with R_{l} = 1 kohm, V_{CE} = 5 V, I_{c} = 4.9 mA and V_{BE} = 0.2 V. The stability factor is desired to be 10. Obtain the values of biasing resistors Rj, R_{2} and R_{E}. Draw the circuit diagram also.
(c) Draw the low frequency hybrid model of transistor amplifier in CE configuration given in fig. 3 (c) and calculate input resistance, current gain and voltage gain of the amplifier. Given h_{ie} = 1 k, h_{re} = 10^{-4}, h_{fe} = 50, h_{oe} = 100 |i mho.
4. Answer any four parts from the following :
(a) Explain the phenomenon of “Pinch off’ in JFET.
An n channel silicon JFET has a donor concentration of 2 x 10^{21}/m^{3} and a channel width of 4 |im. If the dielectric constant of S_{i} is 12, find the pinch off voltage.
(b) Why FET is called voltage controlled device ? Draw the circuit diagram of JFET common drain amplifier and derive the expression for its voltage gain.
(c) In a self bias n channel JFET, the operating point is to be set at I_{D} = 1.5 mA and V_{DS} = 10 V. The JFET parameters are I_{DSS} = 5 mA and V_{P} = -2V. Find the value of R_{s} and R_{D} for given V_{DD} = 20 V, draw the circuit diagram also.
(d) Write the basic difference between enhancement and depletion MOSFET. Draw the structure of P-channel depletion MOSFET and explain working with drain and transfer characteristics.
(e) Draw the structure of n channel JFET its drain and transfer characteristics. Indicate the different regions of operation in the drain characteristics. Why the name is “Field Effect Transistor” ?
(f) Discuss different biasing methods of JFET.
5. Attempt any four parts from the following :
(a) Convert the following as directed :
(i) | (62.7)_{g}-( – | -)u |
(ii) | (0.342)_{6} – ( | -\o |
(iii) | (10.10001)_{2} =( | |
(iv) | 1
1 1 II _rH cq |
—)s |
(v) | (547)_{10} = (BCD code) |
(b) Simplify one of the following Boolean expressions and implement the result as a logic diagram :
(i) ABCD + ABCD + ABCD + ABCD
(ii) AB + ABC [BC + c) + AC Z-3033/3034] 6
(c) Reduce the following using K Map. f(A, B, C, D) = (0,1, 2,11,12,14,15) +d (3, 5, 6,13)
(d) Draw the pin diagram of 741 Op-Amp and mention the function of each pin. What are the characteristics of an ideal Op-Amp ? Why it is called operational amplifier ?
(e) Calculate the maximum and minimum closed loop gain for the amplifier shown in fig. 4 (e) assuming ideal Op-Amp.
(f) State and prove De Morgan’s theorem.
UPTU Previous Year Question Papers
B Tech 1st Year
Electronics Engineering 2006-07