## VTU Previous Year Exam Papers EC 3rd Sem Logic design January 2008

VTU Previous Year Exam Papers EC 3rd Sem Logic design January 2008 Note : Answer any FIVE full questions choosing at least TWO questions from each part. PART-A 1 a. Using Karnaugh map simplify the following Boolean expression and give the implementation of the same using : i) NAND gates only (SOP form) ii) … Read more VTU Previous Year Exam Papers EC 3rd Sem Logic design January 2008