RTU Previous Question Papers BE EC 3rd Sem Electronics Devices & Circuits January 2013
RTU Previous Question Papers BE EC 3rd Semester
Electronics Devices & Circuits January 2013
UNIT – I
1. (a) State the mass-action law as an equation and in words.
Explain why a contact difference of potential must develop across an open circuited p-n junction.
(b) Explain the process of conductivity modulation.
1. (a) What is diffusion ? Explain it with Einstein relation and derive continuity equation.
(b) Derive an expression for diffusion and drift currents.
UNIT – II
2. (a) A diode whose internal resistance is 35.Q is to supply power to a \kQ load from a 220V (rms) supply. Calculate :
(i) Peak load current
(ii) D.C. load current
(i) A.C. load current
(ii) Diode voltage
(iii) Total input power to the circuit and
(vi) Percentage regulation from no load to given load.
(b) Draw the characteristics of UJT and explain its working.
(a) Draw the output waveform for the circuit given.
(b) A full wave rectifier is to be designed to produce a peak output voltage 12 V and delivers a current of 120 mA to the load. It is required to restrict the ripple of not more than 5%. An Input line voltage is 120 V (rms), 60 Hz is available.
UNIT – III
3.(a) Write the Ebers and Moll equations. Sketch the circuit model, which satisfies these equations.
(b) Define stabilization techniques and compensation techniques.
(a)Discuss thermal runway and define thermal resistance. What is the condition for thermal stability ? – Explain.
(b) Explain base width modulation (the early effect) with the aid of plots of potential and minority concentration throughout the base region.
UNIT – IV
(a)The n-channel enhancement mode MOSFET of figure is characterized by V-r = 4 V and IDon =\0mA. Assume negligible gate current, Ry = 50 KQ, R2 = OAMQ; Rg =0, RD~2 KQ and VDD =l5V ■ Find (i) vGSq (ii) lOO and (iii) vDSq.
(b) Define the working of FET as voltage varible resistor.
4.(a) Sketch the circuit of CS amplifier. Derive the expression for the voltage gain at low frequencies. What is the maximum value of Av ?
(b) Draw the biasing circuit for a JFET or a depletion type MOSFET. Explain under what circumstances each of these two arrangements should be used.
UNIT – V
5. (a) Draw a Darlington emitter follower and explain, why the input impedance is higher than that of a single stage emitter follower.
(b) State Miller’s theorem with the aid of a circuit diagram. Repeat for the dual of Miller’s theorem.
5. (a) Derive the expression for the CE short circuit current gain Aj as a function of frequency.
(b) Define /8 and fT. What is the relationship between /q and