RGPV Previous Question Papers BE 4th Sem Computer System and Organisation Dec 2006
RGPV Previous Question Papers BE 4th Semester
Computer System and Organisation Dec 2006
(Mechanical Engineering Branch)
Note: Attempt any five questions. All question carry equal marks.
1. (a) Describe the Von Neumann model and functions of the following:
(I) Memory Buffer Register
(ii) Memory Address Register
(iii) Instruction Register
(iv) Instruction Buffer Register
(v) Program counter
(vi) Accumulator and multiplier quotient
2. (a) How many 128×8 memory capacity of 4096×16?
(b) Write in brief different types of instruction formats.
3. (a) Describe the role of addressing mode used in computers.
(b) Proved that a K-stage liner pipeline can be at most K-time faster them that of non- pipeline serial
4. (a) Explain of the role of virtual Memory.
(b) What must the address fild to an Indexed addressing mode instruction be to make it the same as
the register indirect mode instruction?
5. (a) Describe the procedure for addition and subtraction for fixed point number. Explain by use of
(b) Explain Booth multiplication algorithm and its hardware.
6. (a) Why does DMA have proprityover the CPU when booth request a memory transfer?
(b) What is an interrupt service subroutine? How can the interrupt priority be resolved?
7. (a) Differentiate between following:
(i) Write through and write –back
(ii) Associative memory and cache memory
(b) What is the difference between instruction pipeline and Arithmetic pipeline? What are the
advantages of pipeline?
8. Write short notes on any for the following:
(i) Micro Instruction format
(ii) Daisy chaining
(iv) Locality of reference
(v)Memory Management Hardwere