RGPV Previous Question Papers BE 4th Sem Computer System and Organization June 2008
RGPV Previous Question Papers BE 4th Semester
Computer System and Organization June 2008
(Comman for CSEC&IT. Engg.)
Note: Attempt any five questions.
All question carry equal marks.
1. (a) Draw and explain the structure of Von Neumann machine.
(b) Define the following
(i) Memory address register (ii) Memory data register
(iii) Instruction registers (iv) Accumulator
(v) Programme counter
(c) Show that the statement:
A ← A+A
Symbolize a shift-left micro-operation
(d) Explain the function of the following instruction .also list the micro operation of control
function associate with each.
(i) AND (ii) ADD
2. (A) Define the following terms :
(i) Control memory (ii) Microprogramming sequencing
(iii) Address sequencing (iv) Micro instruction sequencing
(iv) Register transfer language
(b) Differentiate between the following:]
(i) Hardwired control unit and microprogramed control unit.
(ii) Instruction level and microinstruction level instruction execution.
© A microprograme sequences uses a register stock eight level deep. Draw the block diagram of
the sequence formulate the sequence of internal operation which are required to implement
the call and return from subroutine micro instruction.
3. (a) Derive the algorithm in flow chart from for the addition and the subtraction of fixed point
Binary number in sign magnitude represtation with subtraction done by a parallel sub tractor
(E.A←A-B).Show one stage of the adder subtract or circuit with an add –subtract control (ASC).
(b) Show that contents of register A,E,Q and SC during the process of multiplication of to binary
numbers 11111 (multiplicand) and 10101 (multiplier) .The signs are not included.
4. (a) Differentiate between the following
(i) I/O program control transfer and DMA transfer
(ii) Isolated I/O and memory mapped I/O
(b) How many character per second can be transmitted over a 1200 band line in each of the
following modes? (Assume a character code of eight bits) :
(i) Asynchronous transmission with two stop bits.
(ii) Asynchronous transmission with one stop bits.
© What is basic advantages of priority interrupt over a non-priority system? It is possible to have a
priority interrupt without a mask register?
5. (a) What is cache memory ? Discuss the basic design of cache.
(b) A microprocessor uses RAM chips of 1024 × one capacity
(i) How many chips are needed and how should there address lines be connected to provide a
memory capacity of 1024 bits?
(ii) How many chips are needed to provide a memory capacity of 16K bytes? Explain in words
how the chip are to be connected to the address bus.
6. (a) Draw the diagram for a pipeline processor structure. Explain the necessity of a lotus or input
register and processing circuits within a segment.
(b) Explain the following terms:
(i) Pipeline conflicts
(ii) Data dependency
(iii) Priority interrupts
(iv) Memory hierarchy
7. (a) Draw the flowchart and explain how division of two fixed point binary numbers in sig–
magnitude representation is carried out.
(b) With the help of suitable flowchart explain the interrupt initiated data transfer operation.
Discuss its relative’s advantages and disadvantages.
8. (a) Micro instruction format
(b) Virtual memory
(c) Universal asynchronous receiver transmitter.