RGPV Exams Questions Papers IV SEM – Digital Circuit & systems – June-2004

                                    B.E. (Fourth semester) EXAMINATION, June. 2004

(Common for EC/EE/EX Engg.)




Note:     Attempt any five questions. All question carry equal marks.

1. (a) Convert the following :

(i)   (010011110111.1101)2 to Hexadecimal.

(ii)  (327.4)8 to its 8s complement and 7s complement.

(iii) (1101101)2 and (1001000)2 gray code

(iv) Solve using 2s complement:

         (1110100.11)2 – (0110101.1)2

(b) Find the equivalent of the following equation;

      F = u + _ VW’ + X (Y’ + Z)’

(c ) Simplify the logic expression using postulates of Boolean Algebra:

  S=A (B’ + C)’ (BC)’

2. (A) Explain ‘’ minterm’ and don’t care term’

(b) Minimize the expression using K – map and implement using Nand gates only:

       F (A,B,C,D) = ? (2,3,4,5,13,15) + ? d (8,9,10,11)

3. (a) Make a 4 – input NAND gate using 2 –input NAND gates.

(b) Prove EX-OR gate is an odd gate hence can be used foe parity checking

(c ) Design a full-substracter and relies the subs tractor using a decoder.

4. (a) Explain CNOS  logic with its merits and demerits .

(b) Draw the logic diagram, construct the excitation table and give the characteristics equation and

       explain the working of a J-K flip-flop.

5. (A) Design a self starting divide by 3 counter , Represented by the state diagram shown in the

          following figure :


(b) Design BCD to excess-3 code converter circuit and draw the logic diagram.

6. (a) What is multiplexer tree ? Why it is needed? Design a 32×1 multiplexer using 8×1 and 4×1


(b) Implement the given Boolean function with 8×1 multiplexer:

       F (A,B,C,D)  = ? m (0,3,5,6,8,9,10,12,15)

7. Discuss any two of the following:

(i) PLA

(ii) V-F converter

  (iii) Schmitt trigger circuit

8. Write short notes on any three of the following :

(i) Shift Resister

(ii) Demultiplexer

(iii) Asynchronous counters

(iv) Master-slave flip-flop

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