RGPV Exams Questions Papers IV SEM – Digital Circuit & systems – Dec -2008

                                              B.E. (Fourth semester) EXAMINATION, DEC, 2008

(Common for EC/EE/EX Engg.)




Note:     Attempt any five questions. All question carry equal marks.

     1 (a) (i) Add (25)8and (66)8

                (ii) Subtract (7 B) 16and (A 3)16

                (iii)  Represent the decimal number 25 in binary from using

                         (1) BCD   (2)  Gary code   (3)  Hexadecimal  code  (4)  Excess-3 code  (5) Octal code  

                         (6) Binary code

       (b)  Simplify the Boolean function F in sum of products using the don’t care conditions d:

                (i) F= Y’+X’z’     (ii) F= B’C’D+B C D’+ ABCD’

                   d=Yz+xy              d=B’CD’+A’B C’D

2   (a) Simplify each of the following function and implement then with NAND gates:

           (i) F1 = A  C”+A C E+A C E’ +A’CD’ +A’D’E’

          (ii) F2=(B’+D’)( A’+C’+D’)(A+ B’+C’+D’) (A’+B’+C’+D’)

   (b)  Design a multiple- output logic circuit using the following function:

           t1 =?m(2,3,7,10,11,14)+ d(1,5,15)

         t2 =?m(0,1,4,7,13,14) + d (5,8,15)

3 (a) Obtain and NAND logic diagram of a full adder from the Boolean Function:


         S= c’(x+y+z+)+xyz

   (b) Describe the design of parallel adder.

4   (a) Describe the half –subtractor and full-subtractor.

  (b) Draw the logical diagram of Look-Ahead carry generator and describe also.

 5   (a) Describe the monostable and astable multavibrator using IC 555 Timer.

      (b) Explain the following characteristics parameters of digital ICs:

           (i) Speed of operation     (ii) Current and Voltages rating      (iii) Power Dissipation

          (iv) Figure of merit           (v) Noise immunity

6    (a) Why interfacing is required? How TTL can Interface with MOS?

     (b) Describe the Emitter-Coupled logic for-3 inputs OR/NOR gate.

7    (a) Write short notes on semiconductor memories.

      (b)Discribe the BCD ripple counter.

8  (a) Explain the multiplexer and demultiplexer.

    (b) Design BCD to Excess-3 code converter using  Gates.

9  (a) Define the Accuracy and resolution in D/A Converter. What is the resolution of a 9-bit D/A

          converter which uses a ladder network? Also express in percent. If the full scale output voltage of

         this converter is +5, what is the resolution in volts?

   (b) Describe the practical D/A converter.

10   (a) Describe the sample and hold circuit.

        (b) Explain the counter type A/D converter. Suppose counter type A/D Converter is an  8 -bit       

             converter and driven by KHz clock find:                       

           (i) Maximum Conversion time   (ii) Average Conversion time    (iii) Maximum conversion rate


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