RGPV Exams Questions Papers IV SEM – Digital Circuit & systems – dec -2006

                                                 B.E. (Fourth semester) EXAMINATION, DEC, 2006

(Common for EC/EE/EX Engg.)




Note:     Attempt any five questions. All question carry equal marks. Assume any missing data.

1. (a) Convert the decimal number to binary :


(ii) Convert the following number from the given base to base indicated: Octal 623.77 to decimal, binary and hexadecimal.

(iii) Perform the subtractor using 2’s complement method.


(iv) At the following (7F)16 and (BA )16

2. (a) Explain the self complementing code with example .

(b) Express the following function in a sum of min-terms and product of max-terms:

      F (A,B,C) = (A’+B) (B’+C)

(C ) Simplify the Boolean function :

         F = A’B’C’ + B’C’D’+ A’BCD’ + AB’C’

       Use K-map method .

3. (a) What are the half adder and full adder circuit . Explain with their truth table.

(b) Explain the BCD adder with logic diagram

4. (a) Explain the TTL circuit and variety that it performs NAND operation.

(b) Explain the totem –poll output stage of TTL .

5. (a) Clearly distinguish between PMOS , NMOS and CMOS logic circuit.

(b) How they interfacing is done between TTL  To MOS and vice-versa?

6. (a) What are the shift-register ? Explain any one with suitable logic diagram .

(b) Explain multiplexer circuit.

7.  Answer the following briefly:

(i) Differentiate between truth table, excitation and state table.

(ii)   Why the speed of operation of ECL is highest among the all Saturday and non-saturated logic


(iii) Explain the advantages of multi-emitter transfer at the input of TTL logic circuit.

(iv) CMOS has least power dissipation. Why?

8.  Write short notes on any two of the following:

(i) A/D and D/A converter

(ii) Semiconductor memories

(iii) Design of a decade counter.

(iv) Demultiplexer circuit

(v) Ring counter

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