Mumbai University Question Papers Computer Organisation and Architecture Dec 2009

Mumbai University question papers

 III Sem CSE- Examination DEC 2009

Computer Organisation and Architecture

(1) Question No.1 is compul~ry.

(2) Solve any four questions out of remaining.

(3) Draw neat labelled diagram wherever necessary.

1. (a) Explain Vonnewmann model in detail.

(b) Define the following terms microinstruction, microoperation, microprogram.

(c) Explain with suitable example Booth’sAlgorithm for Signed Multiplication.

2. (a) Explain in detail characteristics of RISC and CISC.

(b) Explain restoring division  method, Hence perform 17/3.

3. (a) What is the difference between pipeliningand parallelism? Explainthe Flynn’s Classification in detail.

(b) Explain in brief about SPARC processor.Draw and explain  inbriefn-bitWindows architecture of SPARC processor.

4. (a) How many 128 bytes RAM chipsare required to providea memory of 2048 bytes? Show details of connections, clearly indicating address, data and decoder configuration.

(b) Explain the different RAID levels.

5. (a) Explain page replacement algorithm. Find out page fault for  following string using LRU method.

6 0 12 0 30 4 2 30 32 1 20 15 (Consider page frame size =3).

(b) Explain the interleaved memory in detail.

6. (a) What is Cache coherence? Explain Cache coherence strategies in single processor and multiprocessor systems.

(b) Write short notes on (any two)

(i)DMA

(ii) Programmed I/O

(iii) Interrupt Driven I/O.

7. (a) Explain systolic processor with suitable example.

(b) What is pipelining ? Explain six stage CPU instruction pipeline.

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