Mumbai University Previous year question papers Microprocessor and Microcontroller Dec 2006

Mumbai University Previous year question papers

V Sem Electronics Examination Dec 2006

Microprocessor and Microcontroller

N. B. :

Question Nos. 1 is compulsory.

 Answer any four questions from the remaining questions.

Give proper comments to assembly language programs.

 Assume  suitable data if necessary.

Figures to the right indicate full  marks.


1. Design 8086 microprocessor system to. meet following requirements.

 (a) An 8086 CPU working at 8MHz.

 (b) Co-processor 8087 with the CPU

 (c) 32 KB Monitor Program Area using 2732 chips

 (d) 64 KB Application Program Area using 6264 chips

 (e) 2, 16 Bit input & 2, 16-Bit output, ports, interrupt driven, which are used in variable addressing mode. ‘Discuss the design. Draw memory and I/O maps. l)se absolute addressing technique in the design.


2. (a) Design a 8051 based microcontroller system ‘with following specifications.

 (i) 8051 CPU working at 12 MHz

  (ii) 32 KB Program Memory

 {iii) 32 KB Data Memory

 (iv) . 8255 PPI

Discuss the design.

  (b) Explain following instructions.


(ii) JBCP1.7,THREE



3. (a) With the help of flow chart explain the interrupt processing sequence of 8086 CPU.

(b) Draw the timing diagram for following machine cycles.

(i) Memory Write (Maximum MQde) m/c.

(ii) INTA m/c.


4. (a) list and explain the different data types supported by 8087. 8

(b) What is the purpose of mixed language programming? Write a mixed language program using ASM 86 and C to find given year is a leap year or not.

(c) Convert the. decimal number – 238.84375 into short real format. . 4


5. (a) Write an assembly language program to generate symmetrical square wave on bit of port 1 using timer zero interrupt of 8051. Assume crystal frequency of 12MHz..

(b) Why PUSH SP instruction is absent in the instruction set of any microprocessor or microcontroller ?

(c) With the l’1elpof neat diagram explain internal structure of Port Zero of 8051.


S’. (a). With the help of detail circuit diagram of single CPU module, explain the operation of loosely coupled configuration. How is the local memory address and global memory address differ;.enciated ?

(b) Draw and explain block diagram of clock generator 8284.


7. (a) Why is it not necessary to make odd and even banking while interfacing any kind of ROMS to 8086 ?

(b) What are the internal operations carried out by 8086 CPU upon receiving RESET S’ignal ?

(c) How does NDP (8087) recognise that its master CPU is 8086 or 8088 present in the system? -Why it is necessary for NDP ?

(d) Why ROY input is registered at 2 FF’s in 8284 ?


8. Write short notes on any thre,e :-

(i) IEEE 488 bus standard

(ii) 8255 PPI.

(iii) Interrupt structure of 8051

(iv) Stepper motor interfacing with 8051.

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