# Mumbai University Previous year question papers

## Digital Logic Design and Application

N.S. : (1) Question NO.1 is compulsory.

(2) Attempt any four questions out of remaining six questions.

(3) Assume suitable data and it clearly.

1.(a) Convert (1473.45)10 to Octal, Binary and Hexadecimal.

(b) Perform directly without converting to any other base.

(i) (BC5) H- (A2BD) H (ii) (12.3) 4 + (212.3)4

(iii) (77)s * (17)8 (iv) (11110)2 -:-(110)2

(b) Writethe hamming code for 1010.

(c) State and prove De Morgan’s Theorem.

2. (a) Using the K-map Method minimizationtechnique simplify and draw the circuit for the following function.

F(A,B,C,D,E)= Im(0,1,2,3,5,7,8,9,11,14,16,17,18,19) + d(24,25)

(b) Design 3 bit Binary to gray code converter.

(c) What is essential prime implicant in Quine McClusky Method.

(d) Prove OR-ANDconfiguration is equivalent to aNOR-NOR configuration.

3. (a) What is Canonical SOP and POS form? Explain with an example.

(b) Implement the following using only one 8:I MUX and few gate.

F(A,B,C,D)= Im(0,3,5,7,9,13,15)

(c) Design and draw a combinational circuit that multiplies two 2-bit numbers AIA2 and BIB2 to produce 4-bit product C3C2CICO.

4. (a) Design a sequence generator using T flip-flop for the given sequence. Check for lock-out conditions.

0-72-74-75-70

(b) Implementsthe following Boolean function using 4:1MUX

F(A,B,C,D)=Lm(O,1,2,4,6,9,12,14).

5. (a) Convert SR flip-flop to D and T flip-flop and draw the circuit.

(b)Calculate the characteristics equation using characteristic table of SR, JK, D and T Flip-Plop.

6. (a) Design a synchronous counter for the following sequence using JK FF.Draw the timing diagram.

1-70-73-72-75-74

(b) Using the Quine McClusky method simplify

F=Im(1,3,7,9,11,13,15)+D(2,4)

7. (a) Air India Complex has four elevators for visitors.To save on power only two elevators cars are available.Ifthe traffic is heavy or if carl is shutdown due to technical problem, the third elevators car is switched ON. The fourth elevators car is a standby car which is powered ON if both carl and car2 fai1.Designa logic circuit for starting power to car3 an car4.

(b) Compare TTL, CMOS and ECL families with respect to gate, voltage level, fan-in, fan-out, propagation delay, power dissipation and noise margin. (10