Mumbai University Previous year question papers Digital Logic Design and Application June 2009

Mumbai University Previous year question papers

 III Sem CSE – Examination June 2009

Digital Logic Design and Application

N.S.: (1) Question No.1 is compulsory. —

‘(2) Attempt any four questions out of remaining six questions.

1. (a) Convert (670.17)8 into decimal, binary and hex.

(b) Design 16 : 1 4 : 1 MUX.

(c) Design a full subtractor using only NAND gates.

(d) Simplify the following using Boolean Laws:

(i) A + A B.+ ABC + ABC D

(ii) A [B+ C (AB + AC)]

2. (a) Simplifyusing K-map, obtain SOP equation and realize using only NANDgates.

f(A, B, C, D) =7t M(1, 2, 3, 8, 9, 10, 11, 14) + d(7, 15).

(b) Consider a chemical mixing tank for which there are 3 variables of interest: 10

liquid level, pressure and temperature. The alarm will be triggered under the followingconditions:

. (i) Low level with high pressure

(ii) High level with low pressure

(iii) High level with low temperature and high pressure.

Design the system, implement using only NOR gates.

3. (a) Design>BCDto 7-segment code converter. 10

(b) Draw the 2-input TTLNAND gate and explain. List important characteristics of TTL family.

4. (a) Design a BCD adder using 4-bit binary adders and explain.

(b) Design a MOD-6 synchronous up-counter and explain its operation.

5. (a) Simplify using K-map and realize using NOR gates.


f(A, B, C, D)=~ m(1, 3,7,11,15) + d(O, 2, 5, 8,14).

(b) Draw a 4-bit Johnson counter using shift register and prove that it is “Divide by 4″ logic.

6. (a) Simplify using Quine McClusky method.

f(A, B, C, D) =7t m(O,2, 3, 6, 7, 8, 9, 12, 13).

Realize the equation using any universal gate.

(b) Implement the following expression using

f(A, B, C, D) = ~ m(O, 1, 5, 7, 9, 10, 15).

7. Write short notes on :-

(a) DeMorgan’s Theorems

(b) NOR as universal gate

(c) ALU

(d) TTL Vs CMOS logic family.

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