Mumbai University Previous year question papers
VI Sem Electronics Examination June 2010
(1) Question No, 1 is compulsory.
(2) Attempt any four out of remaining six question.
(3) Figures to the right indicate full marks.
1. Solve any ‘Four’ of the following:
a) Discuss Booth’s algorithm for multiplication. Perform 1001 x 0011 using booth’s algorithm.
b) What is instruction pipelining? Write different branch prediction methods. 05
c) Explain Memory read operation with timing diagram 05
d) What is Memory Segmentation? Explain in Brief. 05
e) Explain In Brief Optical memory. 05
2. a) Explain in details organization of cache memory. Explain different replacement algorithms.
b) What is micro programmed control? Explain in details. Write format of Microinstruction.
3. a) Explain structure of serial and Parallel ports. Write methods to access it. 10
b) Explain Different Hazards in pipelining in details. 10
4. a) Explain in details Hardwired control. Discuss different methods to implement it. 10
b) Explain concept of Virtual memory. What is address translation? Explain use of TLB.
5. a) Explain register organization for IA-32 family. Hence explain different addressing modes for IA-32 architecture.
b) Explain different I/O device access methods. Hence explain use of interrupts to access I/O Device.
6. a) Explain different Mapping functions for Cache memory. 10
b) Explain data transfer in Synchronous Bus with timing diagram. Hence explain bus arbitration schemes.
7. Write short notes on (Any nYQ) : 20
i) RISC Vs CISC Characteristics
iii) The ARM family Architecture(RISC)
iv) Superscalar Architecture.