JNTU IV B.Tech I Semester Supplimentary Examinations, February 2008

JNTU IV B.Tech I Semester Supplimentary Examinations, February 2008

COMPUTER ORGANISATION

(Mechatronics)

SET-I

 

1. (a) Divide -145 by 13 in 2’s complement notation, using 12-bit words.

(b) Explain the floating-point additions and subtraction operations with a flow

chart

 

2. (a) Enlist and explain the various addressing modes of a hypothetical processing system.

(b) Given the following memory values and a one-address machine with an accumulator, what values do the following instructions load into the accumulator? Word 20 contains 40, Word 30 contains 50, Word 40 contains 60 and Word 50 contains 70

i. LOAD IMMIDIATE 20

ii. LOAD DIRECT 20

iii. LOAD INDIRECT 20

iv. LOAD IMMIDIATE 30

v. LOAD DIRECT 30

vi. LOAD INDIRECT 30 06

 

3. With a neat diagram explain the internal organization of 8085. Clearly explain the functions of various registers in 8085

 

4. Consider an accumulator based CPU with the following eight one address instructions. LOAD X, STORE X, ADD X, AND X, JMP X, JMPZ X, CMPL, (Complement Accumulator), and RSHIFT. Give fetch and execute cycle operations and identify the necessary control signals to be generated for the above instructions by a micro programmed control unit.

 

5. (a) Compare and contrast magnetic tape with magnetic disk.

(b) Explain the reading mechanism used in a CD-ROM.

 

6. (a) What do you mean by virtual memory?

(b) Explain the demand paging technique in detail.

 

7. What is Asynchronous Data Transfer? Explain various methods of asynchronous data transfer with timing diagrams.

 

8. Explain Daisy-chain priority interrupt system with block diagram

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