JNTU II B.Tech I Semester Supplimentary Examinations, November 2008

JNTU II B.Tech I Semester Supplimentary Examinations, November 2008


( Common to Computer Science & Engineering, Information Technology

and Computer Science & Systems Engineering)SET-4



1. (a) Explain with an example IEEE 754 single precision floating point representation.

(b) Explain about time shared bus arbitration and its disadvantages.


2. (a) Design a circuit transferring data from a 4bit register which uses D flip-flops to another register which employs RS flip-flops.

(b) What are register transfer logic languages. Explain few RTL statement for branching with their actual functioning.


3. (a) Explain the variety of techniques available for sequencing of microinstructions based on the format of the address information in the microinstruction.

(b) Hardwired control unit is faster than microprogammed control unit. Justify this statement.

4. (a) What is the use of fast multiplication circuits. Write about array multipliers.

(b) Multiply 10111 with 10011 using booths algorithm.


5. (a) What is Virtual Memory? What are the issues behind the usage of this technique?

(b) What are the advantages and disadvantages of using the technique of Paged Segmentation


6. (a) What is Direct Memory Access? Explain the working of DMA.

(b) What are the different kinds of DMA transfers? Explain.

(c) What are the advantages of using DMA transfers?


7. (a) Explain SIMD and MIMD processors in detail.

(b) Explain array processors.


8. (a) Explain the working of 8 x 8 Omega Switching network.

(b) Explain the functioning of Binary Tree network with 2 x 2 Switches. Show a neat sketch

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