CSVTU BE VII Semester IT Advanced Computer Architecture Syllabus

CHHATTISGARH SWAMI VIVEKANAND TECHNICAL UNIVERSITY, BHILAI (C.G.)

Semester: VII Branch: Information Technology.

Subject: Advanced Computer Architecture

Total Theory Periods: 50 Total Tutorial Periods: Nil.

Total Marks in End Semester Exam: 80

Minimum number of class tests to be conducted: 02.

UNIT I: PIPELINE:

Linear pipeline processor: Nonlinear pipeline processor, Instruction pipeline design,

Mechanisms, Dynamic instruction scheduling, Arithmetic pipeline design, Super-scalar

processors, VLIW architecture.

UNIT II: MEMORY HIERARCHY & I/O ORGANIZATION:

Cache memories, Cache coherence, High bandwidth memories, High bandwidth I/O, Disk

I/O, Bus specifications and standards.

UNIT III: PARALLEL COMPUTER MODELS & PROGRAM PARALLELISM:

Classification of Machines, SISD, SIMD & MIMD, Condition of parallelism, data and

resource dependencies, Program partitioning & scheduling, grain size latency, control flow

versus data control, data flow architecture.

UNIT IV: SYNCHRONOUS PARALLEL PROCESSING:

Vector instruction types, vector access memory schemes, vector and symbolic

processors, SIMD architecture, SIMD parallel algorithms, SIMD computers and

performance enhancements.

UNIT V: SYSTEM INTERCONNECTION:

Network properties and routing, static interconnection networks, dynamic interconnection

networks, Multiprocessor system interconnection, Multistage & combining networks.

Text Books:-

1. Flynn, computer Architecture: Pipelined and parallel processor design, JB, Boston.

2. Computer Architecture & Parallel processing – Kai Hwang 7 Briggs.(MGH).

Reference Books:-

1. R.W. Hockney, C.R. Jesshope, “Parallel Computer 2 –Arch..& Algo.”, Adam Hilger.

2. K. Hwang, “Advanced Computer Architecture with ParallelProgramming”, MGH.

3. Parallel computing- Theory and practice – Michael J Quinn- Mc Graw

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