Anna University Model Question Paper BE V sem E&I LINEAR AND DIGITAL INTEGRATED CIRCUITS

MODEL QUESTION PAPER

B.E. ELECTRONICS AND INSTRUMENTATION ENGINEERING

SEMESTER V

EI 332 – LINEAR AND DIGITAL INTEGRATED CIRCUITS

 

TIME : 3 HOURS                                                                                MAX.MARKS : 100

 

Answer all Questions

 

PART –A  (10 x 2 = 20 Marks)

 

1.         What is the advantage / disadvantage of using epitaxial subtrates in analogue and mixed signal IC Design.

 

2.         What is a thin film capacitor?

3.         Define Slew rate of an op-amp?

4.         What is the advantage of precision rectifier over ordinary rectifier?

5.         What are the defining characteristics of Digital logic families?

6.         What is a transmission gate?

7.         Realize exclusive-OR gate using CMOS circuit

8.         Distinguish between the static and dynamic power consumption in CMOS

9.         What are the important specifications of ADC and DAC.

10.       Name the essential parts of a DAC

 

PART – B  (5 x 16 = 80 Marks)

 

11.       With suitable sketches explain the IC fabrication processes such as oxidation, ion implantation, diffusion, lithography, etching, metallisation, bonding and packaging.                                                                                                      (16)

 

12.a)i)  Draw the circuit of a triangular wave generator using lesser number of components and explain its working.                                                                           (12)

 

       ii)  Deduce an expression for the frequency of operation.                                          (4)

 

OR

 

12.b)i)  Draw the working of an op-amp monostable multivibrator with necessary   waveforms.                                                                                                          (12)

 

       ii)  Obtain an expression for the pulse width of this multivibrator.                            (4)

 

13.a)    With neat sketches explain static and dynamic characteristics of combinational MOS logic circuits.                                                                                                (16)

 

OR

 

13.b)i)  Explain the sequential circuit design procedure.                                                   (4)

 

ii)  Find the state diagram and state table of a binary coded decimal to Excess 3 decoder.                                                                                                            (12)

 

14.a)    What are the sequence of steps involved in a generic NMOS process, a generic CMOS process and a generic bipolar process.                                                    (16)

 

OR     

14.b)i)  What is propagation delay.                                                                                    (4)

 

       ii)  Explain with suitable sketches the various factors affecting delay                     (12)

 

15.a)    Draw the functional diagram of the successive approximation ADC and explain its working.                                                                                                              (16)

 

OR

 

15.b)    Explain with suitable block diagram the operation of V/F converter using IC XR2206.                                                                                                           (16)

 

—–

Leave a Comment