Digital System Design Using VHDL Notes eBook

Digital System Design Using VHDL Notes eBook
60% Off

Digital System Design Using VHDL Notes eBook

4889 Views
Publisher: VTU eLearning
Availability: In Stock
INR 10.00 INR 4.00 ( 60% Off )
Effective Price after using Coupon Code: SAVE20
Download & Read Books Offline (Desktop/Laptop/Android Device) :
Customers who Bought this Ebook also Bought
  • Description

About this eBook

Introduction to VHDL VHDL is an acronym for VHSlC Hardware Description Language VHSIC is an acronym for Very High Speed Integrated Circuits . It is a hardware description language that can be used to model a digital system at many levels of abstraction ranging from the algorithmic level to the gate level. The complexity of the digital system being modeled could vary from that of a simple gate to a complete digital electronic system, or anything in between. The digital system can also be described hierarchically. Timing can also be explicitly modeled in the same description. VHDL resulted from work done in the 70s and early 80s by the U.S. Department of Defense. Its roots are in the ADA language, as will be seen by the overall structure of VHDL as well as other VHDL statements. VHDL usage has risen rapidly since its inception and is used by literally tens of thousands of engineers around the globe to create sophisticated electronic products. VHDL is a powerful language with numerous language constructs that are capable of describing very complex behavior.
VHDL Terms VHDL is used to describe a model for a digital hardware device. This model specifies the external view of the device and one or more internal views. The internal view of the device specifies the functionality or structure, while the external view specifies the interface of the device through which it communicates with the other models in its environment Entity. All designs are expressed in terms of entities. An entity is the most basic building block in a design. The uppermost level of the design is the top-level entity. If the design is hierarchical, then the top-level description will have lower-level descriptions contained in it. These lower-level descriptions will be lower-level entities contained in the top-level entity description. The entity describes the external interface to the model specifies the inputs, outputs signals . It is the Hardware abstraction of a Digital system, but it does not provide any inner details.
Architecture. All entities that can be simulated have an architecture description. The architecture describes the behavior of the entity. A single entity can have multiple architectures. One architecture might be behavioral while another might be a structural description of the design.
The architecture describes the function behavior of the model. Behavior of entity is defined by the relationship of the input to the output. It specifies the inner details of the circuit
For examples relating to architecture entity refer to presentation 1.
Configuration. A configuration statement is used to bind a component instance to an entity-architecture pair. A configuration can be considered like a parts list for a design. It describes which behavior to use for each entity, much like a parts list describes which part to use for each part in the design.
Package. A package is a collection of commonly used data types and subprograms used in a design. Think of a package as a toolbox that contains tools used to build designs.